LG 50PQ30 Training Manual page 78

Z - SUS Block Diagram
Z - SUS Block Diagram
Control Board
Receives
Logic
Signals
Circuits generate erase,
sustain waveforms
POWER SUPPLY Board
5V, 17V
Z-SUS board receives VS and
17V
M5V from Y-SUS and 17V from
the Control board
NO IPMs
FET Makes Drive waveform
Simplified Block Diagram of Z-SUStain Board
M5V and VS
Y-SUS Board
M5V and VS
Generates Z Bias 100V
78 November 2009 50PQ30 Plasma
Via 3 FPC
Flexible
Printed
PDP
Circuits
Display
Panel
Z-SUB