Schematic Diagram Of Qm (2/6) Board - Sony KDS-50A2000 Service Manual

(35) Schematic Diagram of QM (2/6) Board

1 2 3 4
IC7300
215H47AGA21HG
K10
VSS
K11
VSS
K12
VSS
A K13
VSS
K14
VSS
K15
VSS
XILLEON240 GROUND BALLS
K16
VSS
K17
VSS
K18
IC7300
VSS
215H47AGA21HG
K19
VSS
K20
VSS
K21
VSS
L10 A2
VSS VSS
L11 A29
VSS VSS
L12 B1
VSS VSS
L13 B2
VSS VSS
B
L14 C3
VSS VSS
L15 D4
VSS VSS
L16 E5
VSS VSS
L17
VSS
L18
VSS
L19
VSS
IC7300
L20
VSS
215H47AGA21HG
L21
VSS
M10
VSS
M11
VSS
AA10
VSS
M12
VSS
AA11
VSS
M13
VSS
AA12
C VSS
M14
VSS
AA13
VSS
M15
VSS
AA14
VSS
M16
VSS
AA15
VSS
M17
VSS
AA16
VSS
M18
VSS
AA17
VSS
M19
VSS
AA18
VSS
M20
VSS
AA19
VSS
M21
VSS
AA20
VSS
N10
VSS
AA21
VSS
N11
VSS
N12
VSS
N13
VSS
N14
D VSS IC7300
215H47AGA21HG
N15
VSS
N16
VSS
N17
VSS
N18 Y30
VSS VSS
N19 AF30
VSS VSS
N20 AJ1
VSS VSS
N21 AJ30
VSS VSS
P10 AK2
VSS VSS
P11 AK29
VSS VSS
P12
VSS
P13
VSS
P14
VSS
E P15
VSS
P16
VSS
P17
VSS
P18
VSS
P19
VSS
P20
VSS
P21
VSS
R10
VSS
R11
VSS
R12
VSS
R13
VSS
R14
VSS
IC7300
R15
F VSS 215H47AGA21HG
R16
VSS
R17
VSS
R18 IC7300
VSS
215H47AGA21HG
R19
VSS
R20
VSS
R21
VSS
T10 A3
VSS /FCE0
T11 B4
VSS /FCE1
T12 C5
VSS /FCE2
G
T13 D6
VSS /FCE3
T14 D7
VSS FRD
*
T15 C6 R7593 XX
VSS FWE
T16 B5 *R7594 XX
VSS /FRDY
T17 A4
VSS FSTB
T18 A5
VSS FALE0
T19 B6
VSS FALE1
* R7397 XX
T20 C7
VSS FBE0
*R7398 XX 1/16W
T21 D8
VSS FBE1
CHIP
U10 G3
VSS FAD0
5%
U11 F2 1005
VSS FAD1
RB7914
U12 E1
VSS FAD2
U13 G4
H VSS FAD3
U14 F3
VSS FAD4
U15 E2
VSS FAD5
U16 D1 RB7303
VSS FAD6
U17 F4
VSS FAD7
U18 E3
VSS FAD8
U19 D2
VSS FAD9
RB7302
U20 C1
VSS FAD10
U21 E4
VSS FAD11
V10 D3
VSS FAD12
V11 C2
VSS FAD13
V12 B3
VSS FAD14
V13 C4
VSS FAD15
I V14 D5 * R7399 XX
VSS FCLK
V15 H4
VSS FBINTR0
V16 F1
VSS FBINTR1
V17 G2
VSS FBINTR2
V18 H3
VSS FBINTR3
V19 AK11
VSS FBINTR4
V20 A14
VSS NMI
V21 RB7310
VSS
W10
VSS
W11 R7304
IC7300
VSS
W12 215H47AGA21HG
VSS
W13
VSS
W14
J
VSS
W15 AJ21
UART-A
VSS RDA
W16 AH21 R7322 100 1/16W
VSS TDA
W17 AG21 R7766 0 CHIP
VSS /RTSA
W18 AK22 R7449 0 CHIP
VSS /CTSA
1/16W
W19 AJ22 R7551 100
VSS RDB
UART-B
W20 AH22 R7549 100 1/16W
VSS TDB
*
W21 C13 R7932 XX
VSS RDC
UART-C
Y10 B13 * R7933 XX
VSS TDC
R7570
Y11 AG20 0 CHIP
VSS I2CCLKA
I2C-A
Y12 AK21 R7571 0 CHIP
VSS I2CDATAA
Y13 AJ20
VSS I2CCLKC
I2C-C
Y14 AH20
VSS I2DATAC
K
Y15 AH19
VSS IR IRBIDB
Y16 AG19
VSS IRRXDA
0 CHIP
Y17 AK20 R7447
VSS IRTXDA
Y18 A13
VSS TIMER CAPT1
Y19 D14
VSS COMP1
Y20
VSS
Y21
VSS
L
5 6 7
ASIC CORE POWER
D1.2V
IC7300
CORE_1.2V
215H47AGA21HG
C7320
C7721
470
470
E11 4V
4V
VDDC
E12 C7719
VDDC
220
E16
4V
VDDC
E17
VDDC D1.2V
E20
C7441 C7444
VDDC (NEED <50mV NOISE)
0.1 0.1
E21
16V 16V
VDDC
1005 1005
E24
VDDC
C7354 C7425 C7382 C7386
E25 C7422 C7378 C7439
VDDC 0.1
0.1 0.1 0.1 0.1 0.1 1
16V
F5 16V 16V 16V 16V 16V 6.3V
VDDC 1005
1005 1005 1005 1005 1005 1005
G5
VDDC
G26 C7377 C7381 C7443
VDDC
0.1 0.1 0.1
H26 16V 16V 16V
VDDC
1005
1005 1005
L26
VDDC
C7352 C7420 C7358 C7373 C7385
M5
VDDC 0.1 0.1 0.1
0.1 1
16V 16V
M26 16V 16V 6.3V
VDDC
1005 1005 1005 1005 1005
N5
VDDC
U5
VDDC
V5
VDDC
V26
VDDC
C7351 C7357 C7372 C7376 C7438 C7384
W26
VDDC 0.1 0.1 0.1 0.1 0.1 1
16V 16V 16V 16V 16V
AA5 6.3V
VDDC 1005 1005 1005 1005 1005
1005
AB5
VDDC
3225
AD26
VDDC R
16V
AE5
VDDC 22
C7356
AE26
VDDC
3225 C7366 C7448
AF5
VDDC R 1 1
16V
6.3V
AF8 22 6.3V
VDDC 1005
C7350 1005
AF9
VDDC
AF12
VDDC
C7353 C7359 C7374 C7432 C7440 C7450
AF13
VDDC 0.1 0.1 0.1 0.1 0.1 1
6.3V
AF17 16V 16V 16V 16V 16V
VDDC 1005
1005 1005 1005 1005 1005
AF18
VDDC
AF21
VDDC
AF22
VDDC
IC7300
215H47AGA21HG D3.3V
C7365 C7379 C7965 C7966
1 1 0.1 0.1
6.3V 6.3V 16V
16V
1005 1005 1005
1005
E6
VDDP
C7349 C7355 C7383 C7967
C7375 C7964
E7 0.1
VDDP 0.1 0.1 0.1 0.1 0.1
16V
E8 16V 16V 16V 16V 16V
1005
VDDP 1005 1005 1005 1005 1005
E9
VDDP
E10
VDDP
H5
VDDP
J5
VDDP
K5
VDDP 3225
L5
R
VDDP
16V
22
C7348
IC7300
215H47AGA21HG
U26
PESD
AC26
PESD
AF23
PESD
IO POWER MEMORY (3.3V)
STRAPS
* R7731
XX /CS0
D3.3V D3.3V D3.3V D3.3V D3.3V
R7372 R7741
R7363 R7371 R7361
10k
XX 10k 10k 10k
1/16W
1/16W 1/16W 1/16W
CHIP
CHIP CHIP CHIP
5%
5% 5% 5%
/WE
R7736 R7367 R7362 R7740 R7739
R7365 R7364 R7742
/RDY 10k XX
XX XX XX XX XX XX
1/16W
CHIP
5%
0-NORMAL OPERATION BOOTROM_SEL (3:0)= RESERVED 0-SET USB 00-SOLD
1-FACTORY TEST B '1000' : ST M25P10 PREFERRED TO BE NOPOWERSWITCHING 01-RESERVED
'0111' : ST M25P80
BE0
INTERNAL PULL DOWN '0100' : 8bit 32,64,128,256 Mbit '0' DURING RESET BIT ON RESET 10-RESERVED
BE1 AMD (64Mbit only,Toshiba or Samsung)
INTERNAL PULL DOWN INTERNAL PULL DOWN 11-RESERVED
INTERNAL PULL DOWN
AD0
INTERNAL PULL DOWN
AD1
22 AD3
AD2
AD5
AD6
AD4
22
AD7
AD8
AD9
22 AD10
AD11
CLK
/INTR0
C7995
XX
10k
10k 1/16W
D3.3V
/INTR2_NAND
RDA_TO_X240 PORT-A IS FOR TV COMM
TDA_FROM_X240
GVSYNC_TO_X240
GHSYNC_TO_X240
D3.3V
DIAG_RXD
DIAG_TXD
R7421
R7423
RDC 3.3k
3.3k
1/16W
1/16W
TDC CHIP CHIP I2C-A IS CONFIGURED AS I2C MASTER
5% 5%
I2CA_SCL
I2CA_SDA
GCLK_TO_X240
8 9 10 11
D2.6V
IC7300
JL7316
215H47AGA21HG
C7720
470
4V
IO POWER MEMORY (1.8V/2.5V)
P26
VDDR1
R26 C7452 C7458 C7459 C7405 C7410 C7968
VDDR1 0.1 0.1 0.1 0.1 0.1 0.1
T26
16V 16V 16V 16V 16V 16V
VDDR1
1005 1005 1005 1005 1005 1005
W30
VDDR1
Y26
VDDR1
AA26
VDDR1
C7392 C7398 C7403 C7461 C7464
AB26
0.1 0.1 0.1 0.1 0.1
VDDR1
16V 16V 16V
AF24 16V 16V
VDDR1
1005 1005 1005 1005 1005
AF25
VDDR1
AF26
VDDR1
AG30 C7463
VDDR1
0.1
AK28 16V PLACE ACROSS AG30 AND AF30
VDDR1
1005
3225 3225
R
R
16V 16V
22 22
C7391 C7397
IC7300 D3.3V
215H47AGA21HG
IO POWER 3.3V PIN (e.g.GP10)
E13
VDDR3
C7416
C7390 C7396 C7402 C7408 C7412
E14 0.1
VDDR3 0.1 0.1 0.1 0.1 0.1
16V
16V 16V 16V 16V 16V
E18 1005
VDDR3 1005 1005 1005 1005 1005
E19
VDDR3
E22
VDDR3
E23
VDDR3
E26
VDDR3
F26
VDDR3
C7389 C7395 C7401 C7407 C7411 C7415
J26
VDDR3 0.1 0.1
0.1 0.1 0.1 0.1
K26 16V 16V 16V 16V 16V 16V
VDDR3
1005 1005 1005 1005 1005 1005
P5
VDDR3
R5
VDDR3
W5
VDDR3
Y5
VDDR3
3225
3225
AC5 R R
VDDR3
16V 16V
AD5 22 22
VDDR3
C7388 C7394
AF6
VDDR3
AF7
VDDR3
AF10
VDDR3
C7953 C7954 C7955 C7956 C7957 C7960
C7958 C7959 C7961 C7962 C7963
AF11
VDDR3 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 1 1 1
16V 16V 16V 16V 16V 16V 16V 16V 6.3V
AF14 6.3V 6.3V
VDDR3
1005 1005 1005 1005 1005 1005 1005 1005 1005 1005 1005
AF15
VDDR3
AF19
VDDR3
AF20
VDDR3
PLACE ALL OF THESE CAPACITORS AT THE BOTTOM OF XILLEON240
THESE MUST BE BETWEEN GND PADS AND POWER PADS.
EACH POWER AND GND BALL MUST HAVE ITS OWN VIA HOLE.
215H47AGA21HG
FLEXBUS_POD
D3.3V
/CS0
R7370 BE0
XX
BE1
/WE USB_OVRCUR
R7738 R7737
/RDY
XX XX
/INTR0
AD0
RESERVED
AD1
PREFERRED TO BE '0' DURING RESET
AD2
INTERNAL PULL DOWN
AD3
AD4 215H47AGA21HG
AD5
AD6
AD7
CLK
R7745
XX
Mount Mecha A7300 409815701 XX
IC7300
R7746
XX
– 72 –
KDS-50A2000/50A2010/55A2000/60A2000/60A2010
K
RM-YD010
12 13 14
I/O POWER
VDDC_1.8V
AF16
VDDC18_BOTM
C7387 C7393 C7406 C7409 3225
T5
0.1 R
VDDC18_LEFT 0.1 0.1 0.1
16V
N26 16V 16V 16V 16V 22
VDDC18_RIGT 1005 1005 1005 1005 C7419
E15
VDDC18_TOP
IC7300
215H47AGA21HG
X7300
55.474MHz C7400 18p 50V
C7404 22p 50V
3RD OVERTONE XTAL
IC7300 R7319
0
215H47AGA21HG C7969 1000p 50V
CHIP
L7329
0.39uH
F27
XTALIN
C7994
F28
XTALOUT 0.1
16V
G28
OSC_AVDD OSC_AVDD
F29
OSC_AVSS
G27
OSC_GUARD
X7301
H27
OSC_CLK 25.14MHz C7369 15p 50V
D21
FE_XTALIN
C7362 15p 50V
D20
FE_XTALOUT
B20
FE_OSC_AVDD FE_OSC_AVDD
A20
FE_OSC_AVSS
C7449
C20
FE_OSC_GUARD 0.1
16V
B21
FE_OSC_CLK 1005
AF29 MPVDD
MPVDD
C7991 0.1 16V
AE29
MPVSS
G30
VPVDD VPVDD
C7993 0.1 16V
G29
VPVSS
D19
FPVDD FPVDD
C7992 0.1 16V
D18
FPVSS
W4
PMIVDD PMIVDD
C7976 1 0.1 16V
Y4 2
PMIVSS
Ground Pins for each PLL power supply
needs to be routed with supply.
* R7450 PLACE CLOSE TO CONNECTOR
D5V
0 C7509
CHIP 100
16V
1005
C7504 C7511
C7506 C7503 C7596 C7520 0.01
0.1 FB7314
0.1 22 XX 25V
100 25V
25V *IC7330 16V
16V B
B B B
XX
1608
FB7313
0uH
D3.3V
GND OUT D3.3V
IN OUT
R7506
100k
* R7505 1/16W
IN OUT
XX
CHIP
5%
EN /OC
IC7300
4 1
3 2
4.7 1/10W FL7300
AH23 R7534
USBPA
R7536 4.7 1/10W
AG22
USBNA
R7925 4.7 1/10W
AK24
USBPB USBP_B
R7926 4.7 1/10W
AJ23
USBNB USBN_B
R7535 0 CHIP R7520
AK23
15k
R7519
R7517 1/10W R7518
15k
15k RN-CP 15k
1/10W 5% 1/10W 1/10W
RN-CP RN-CP RN-CP
5% 5% 5%
IC7300
SPI USB TRACES NOTES:
R7537 0 CHIP SPI_CLK
G1
SPI_CLK
R7538 CHIP SPI_IN a.Keep D+ and D- traces the same length
J4 0
SPI_IN
R7539 0 CHIP SPI_OUT b.Achleve 90 ohm differential characteristic impedance
H2
SPI_OUT
R7540 0 CHIP SPI_CSO c.Keep D+ and D- traces parallel
J3
SPI_CS0
R7541 0 CHIP SPI_CS1 d. Do not route USB D+ AND D- over a power plane split
H1
SPI_CS1
e.Do not route USB D+ and D- over high frequency signals.
f.It is preferable to route USB D+ and D- over a ground layer.
g.It is preferrable to route USB D+ and D- using a single layer.
QM (2/6) BOARD
RM-YD010 RM-YD010 RM-YD010 RM-YD010
15 16
* C7311
XX
USB
"A" receptacle
USB SMT
HORIZONTAL
JL7866 1
JL7357 1
JL7358 1 * CN7311
XX
JL7359 1
CN7313
5P
WHT
1
2
3
4
5