Pioneer CDJ-2000 Service Manual page 29

5
[1] Failure in Startup
[1-1] No power
No. Cause Diagnostics Point
The SW power-
1 SRVA Assy
supply does not
function properly.
The power-supply
does not function
2 Related point
properly.
The EUP control
unit does not
3 SRVA Assy
function properly.
Various power-
supply ICs do
4 SRVA Assy,
not function
MAIN Assy
properly.
[1-2] Indications on the LCD
Check the indications on the LCD.
Nothing is displayed on the LCD. (Black screen)
No. Cause Diagnostics Point
Power supply for
1 TFTB Assy
the backlight is
not input properly.
Indications on the LCD are in white screen.
No. Cause Diagnostics Point
The TFT_CPU
1 does not function TFTB Assy
properly.
Startup stops with the "Pioneer" logo displayed.
No. Cause Diagnostics Point
Communication
between the MAIN
TFTB Asssy,
1
CPU and TFT CPU
MAIN Assy
could not be
established.
[2] Display (JOG FL/LED)
The JOG FL and the LEDs are controlled by the PANEL CPU (IC8005).
[2-1] The JOG FL does not light.
No. Cause Diagnostics Point
Power is not
1 JFLB Assy
supplied properly.
Defective control
2 JFLB Assy
signal
3 Defective JOG FL
5
6
Item to be Checked
Check V+12_EUP.
Check V+3R3_PNL.
Check the EUP_CONT signal.
Check each power-supply IC.
Item to be Checked
Check the connection on the V+12_T line
and check the mounting status of the
peripheral parts of the backlight power
circuit.
Item to be Checked
Check the power supply and signals around
the TFT_CPU.
• V+3R3T_BF, V+1R2_BF
• RESET_TFT
• BUSCLK (Approx. 98 MHz)
Item to be Checked
Check the serial communication cable
connection between the MAIN CPU and
TFT CPU.
Item to be Checked
Check the power-supply voltages (V+3R3,
VFDP2R7_F1, VFDP2R7_F2, and V+27)
of the FL.
Check that the FL control line is properly
connected in the JFLB ASSY.
• J_SCLK
• J_BK
• J_LAT
• J_DSO
If the symptom persists after the above
corrections,
CDJ-2000
6
7
Corrective Action
If V+12_EUP (CN7301 pin_1) is not output, the
SW power-supply is defective. Replace it.
The regulator IC (IC7010) may be loosely connec-
ted with its peripheral devices or a part may be
defective. Correct loose connection.
If the symptom persists, replace the defective part.
If the signal is L, check the output of the SW power-
supply IC. If V+12(CN7301 pin_2) is not output, the
SW power-supply IC is defective. Replace it.
If the signal is H, see [10] EUP Mode.
The regulator IC and its peripheral devices for each
power supply may be loosely connected or a part
may be defective. Correct loose connection.
If the symptom persists, replace the defective part.
Corrective Action
The V+12_T line may be loosely connected or the
backlight power circuit may be defective.
Correct loose connection.
If the symptom persists, replace the defective part.
Corrective Action
Diagnose the TFT_CPU and its peripherals,
referring to [12-5] E-7023: GUI CPU ERROR.
Corrective Action
Diagnose the TFT_CPU and its peripherals,
referring to [12-5] E-7023: GUI CPU ERROR.
Corrective Action
Each power-supply may be loosely connected or may
be defective. Correct loose connection.
If the symptom persists, replace the defective part.
Check the connection and correct loose connection.
As the JOG FL is controlled by the PANEL CPU,
if no signal is output, check the PANEL CPU.
Replace the JOG FL.
7
8
A
Reference
10.2 SRVA(2/2),
SPCN, INSW and
SLMB ASSYS
10.1 SRVA
ASSY(1/2)
10.2 SRVA(2/2),
SPCN, INSW and
B
SLMB ASSYS
Reference
C
10.9, 10.10
TFTB ASSY
Reference
10.9 TFTB
ASSY(1/2)
D
Reference
E
Reference
10.12
JFLB ASSY
10.12
JFLB ASSY
F
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