Sony STR-DA3100ES Service Manual page 84

STR-DA3100ES
Pin No. Pin Name
65 SLSRI
66 FLFRI
67 TEST3
68 CLK512
69 VSS
70 XRST
71 VDD
72 SCLK
73 XCS
74 SI
75 SO
76 DEXRI
77 DMLI
78 DMRI
79 VSS
80 PHRI
81 BCKAI
82 DQM
83 DLI
84 DRI
85 DCI
86 DLFEI
87 DLSI
88 DRSI
89 VSS
90 to 95 D15 to D10
96 VDD
97, 98 D9, D8
99 GND
100 D0
84
I/O
I Surround audio data input from the DSP2
I Front audio data input from the DSP2
I Input terminal for the test
I Master clock signal input terminal
– Ground terminal
I Reset signal input terminal "L": reset
– Power supply terminal (+3.3V)
I Serial clock signal input from the main system controller
I Chip select signal input from the main system controller
I Serial data input from the main system controller
O Serial data output to the main system controller
I Not used
I Data input terminal for L-ch down mix Not used
I Data input terminal for R-ch down mix Not used
– Ground terminal
I Clock signal input terminal Not used
I Bit clock signal (2.8224 MHz) input terminal Not used
O Not used
I Front L-ch data input terminal Not used
I Front R-ch data input terminal Not used
I Center data input terminal Not used
I Sub woofer data input terminal Not used
I Surround L-ch data input terminal Not used
I Surround R-ch data input terminal Not used
– Ground terminal
I/O Two-way data bus with the SD-RAM
– Power supply terminal (+3.3V)
I/O Two-way data bus with the SD-RAM
– Ground terminal
I/O Two-way data bus with the SD-RAM
Description