Ic Pin Function Description - Sony MDX-CA680 Service Manual

Fm/am (mw/lw) minidisc player
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4-17. IC PIN FUNCTION DESCRIPTION

• SERVO BOARD IC301 CXD2662R
(DIGITAL SIGNAL PROCESSOR, DIGITAL SERVO PROCESSOR, EFM/ACIRC ENCODER/DECODER,
SHOCK PROOF MEMORY CONTROLLER, ATRAC ENCODER/DECODER)
Pin No.
Pin Name
1
MNT0 (FOK)
2
MNT1 (SHOCK)
3
MNT2 (XBUSY)
4
MNT3 (SLOCK)
5
SWDT
6
SCLK
7
XLAT
8
SRDT
9
SENS
10
XRST
11
SQSY
12
DQSY
13
RECP
14
XINT
15
TX
16
OSCI
17
OSCO
18
XTSL
19
DIN0
20
DIN1
21
DOUT
22
DADTAI
23
LRCKI
24
XBCKI
25
ADDT
26
DADT
27
LRCK
28
XBCK
29
FS256
30
DVDD
31 to 34
A03 to A00
35
A10
36 to 40
A04 to A08
41
A11
42
DVSS
43
XOE
44
XCAS
45
A09
I/O
Focus OK signal output to the MD mechanism controller (IC501)
O
"H" is output when focus is on ("L": NG)
O
Track jump detection signal output to the MD mechanism controller (IC501)
O
Busy monitor signal output to the MD mechanism controller (IC501)
O
Spindle servo lock status monitor signal output to the MD mechanism controller (IC501)
I
Writing serial data signal input from the MD mechanism controller (IC501)
I
Serial data transfer clock signal input from the MD mechanism controller (IC501)
I
Serial data latch pulse signal input from the MD mechanism controller (IC501)
O (3)
Reading serial data signal output to the MD mechanism controller (IC501)
O (3)
Internal status (SENSE) output to the MD mechanism controller (IC501)
I
Reset signal input from the MD mechanism controller (IC501) "L": reset
Subcode Q sync (SCOR) output to the MD mechanism controller (IC501)
O
"L" is output every 13.3 msec
Digital In U-bit CD format subcode Q sync (SCOR) output terminal
O
"L" is output every 13.3 msec
Laser power selection signal input terminal
I
"L": playback mode, "H": recording mode (fixed at "L" in this set)
O
Interrupt status output to the MD mechanism controller (IC501)
Recording data output enable signal input terminal
O
Writing data transmission timing input (Also serves as the magnetic head on/off output)
Not used (fixed at "L")
I
System clock signal (1024Fs=45 MHz) input from the oscillator circuit
O
System clock signal (1024Fs=45 MHz) output terminal Not used (open)
Input terminal for the system clock frequency setting
I
"L": 45.1584 MHz, "H": 22.5792 MHz (fixed at "L" in this set)
I
Digital audio signal input terminal when recording mode Not used (fixed at "L")
I
Digital audio signal input terminal when recording mode Not used (fixed at "L")
O
Digital audio signal output terminal when playback mode Not used
I
Recording data input terminal Not used (fixed at "L")
I
L/R sampling clock signal (44.1 kHz) input terminal Not used (fixed at "L")
I
Bit clock signal (2.8224 MHz) input terminal Not used (fixed at "L")
I
Recording data input terminal Not used (fixed at "L")
O
Playback data output to the PCM1718E (IC101)
O
L/R sampling clock signal (44.1 kHz) output to the PCM1718E (IC101)
O
Bit clock signal (2.8224 MHz) output to the PCM1718E (IC101)
O
Clock signal (11.2896 MHz) output to the PCM1718E (IC101)
Power supply terminal (+3.3V) (digital system)
O
Address signal output to the D-RAM (IC307)
O
Address signal output to the external D-RAM Not used (open)
O
Address signal output to the D-RAM (IC307)
O
Address signal output to the external D-RAM Not used (open)
Ground terminal (digital system)
O
Output enable signal output to the D-RAM (IC307) "L" active
O
Column address strobe signal output to the D-RAM (IC307) "L" active
O
Address signal output to the D-RAM (IC307)
MDX-CA680/CA680X
Description
Almost all, "H" is output
Almost all, "H" is output Not used (open)
41

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