Panasonic JS-170FR Series Service Manual page 36

Pin No. Signal name
A 19 PDD8
B 19 PDD9
C 19 PDD10
D 19 PDD11
D 17 PDD12
E 19 PDD13
E 17 PDD14
F 19 PDD15
G 19 PDDACK#
F 18 PDDREQ
F 17 PDIOR#
F 16 PDIOW#
G 20 PIORDY
B 12 PHLD#
A 12 PHLDA#
R 03 PIRQA#
R 04 PIRQB#
P 05 PIRQC#
G 01 PIRQD#
U 20 PWRBTN#
M 18 PWROK
N 20 RCIN#
P 18 RI#/GPI12
M 17 RSMRST#
L 01 RTCALE/GP025
K 02 RTCCS#/GP024
N 19 RTCX1
R 20 RTCX2
W 07 REFRESH#
M 01 REQA#/GPI2
N 02 REQB#/GPI3
P 03 REQC#/GPI4
W 01 RSTDRV
U 11 SA0
T 11 SA1
W 11 SA2
Y 11 SA3
T 10 SA4
W 10 SA5
U 09 SA6
V 09 SA7
Y 09 SA8
T 08 SA9
W 08 SA10
U 07 SA11
V 07 SA12
Y 07 SA13
V 06 SA14
Y 06 SA15
T 05 SA16
W 05 SA17
U 04 SA18
V 04 SA19
IN/OUT
E-IDE Primary data bus.
IN/OUT
OUT E-IDE Acknowledge to primary side PDDREQ.
IN E-IDE Primary side DMA request signal.
OUT E-IDE Primary side read signal.
OUT E-IDE Primary side write signal.
IN E-IDE Primary side ready signal.
OUT PCI bus hold request signal.
IN PCI Hold acknowledge signal to PHLD#.
IN/OUT OCI bus interrupt signal.
IN Input pin for system's ON/OFF.
IN System power input signal.
IN Initialize request signal to the CPU. (← KBC)
IN Used as a general-purpose input port.
IN An input intended to reset the internal suspension state.
OUT Used as a general-purpose output port.
IN/OUT Clock signal of 32.768kHz for RTC.
IN/OUT Memory refresh signal to the ISA bus.
IN DMA request signal for the PCI bus.
OUT Reset signal for the ISA system logic.
IN/OUT ISA System address bus.
2-6
Functions
Active : High
Active : Low
Active : Low
Active : Low
Active : High