HP 7942 Service Manual page 39

• HP-IB Data Bus
• RAM Data Bus
• Microprocessor Address Bus
• Microprocessor Data Bus
• DMA Gate Array Data Bus
• Read/Write Data Bus
A brief description of the function of each internal
bus is provided in the following paragraphs.
3-6. HP-IB DATA BUS. The HP-IB Data Bus is
accessed by the microprocessor and by the DMA
gate array IC input and output processes. The mic-
roprocessor must read and write to the various
registers in the HP-IB interface IC in order to
prepare for data transfers to and from the host
computer. Buffers separate the HP-IB Data Bus
from the RAl\1 Data Bus and permit speed match-
ing between the HP-IB data rate and the DMA
gate array IC data transfer rate.
3-7. RAM DATA BUS. The RAM Data Bus is
used for all data transfers between the RAM and
the microprocessor, the RAM and the DOC's, and
the RAM and the HP-IB. The use of the RAM is
time multiplexed so that in one half of the micro-
processor clock cycle the microprocessor has access
to the RAM and in the other half the DMA gate
array IC has access to the RAM.
3-8. MICROI)ROCESSOR ADDRESS BUS. The
Microprocessor Address Bus points to the next in-
struction or data source. The circuits addressed by
the Microprocessor Address Bus include the HP-IB
interface IC, RAM (via the address multiplexer),
DMA gate array IC, EXEC EPROM, DOC 0
EPROM, and DOC 1 EPROM. The DDC EPROM's
are overlaid on the same address space. An EPROM
switch selects the DDC 0 EPROM or the DOC 1
EPROM when the time interval for DOC 0 or
DOC 1 occurs. The microprocessor can write
directly to one or two DDC's via a buffer and the
DC-IB Control/Status Address Bus to operate the
mass storage units.
Theory of Operation
7942 and 7946
3-9. MICROPROCESSOR DATA BUS. The Mic-
roprocessor Data Bus interconnects the micro-
processor, the EXEC EPROM, the DOC 0 EPROM,
and the DOC 1 EPROM. The microprocessor RAM
exists on a separate bus so that the RAM can be
shared by the microprocessor and the DMA gate
array IC. The bidirectional data on the Micro-
processor Data Bus includes preprogrammed con-
trol sequences (algorithms) in EPROM and con-
trol/status information from the DOC's. The Mic-
roprocessor Data Bus is connected to the DDC's via
a bidirectional buffer and the DC-IB Con-
trol/Status Data Bus.
3-10. DMA GATE ARRAY DATA BUS. The
DMA Gate Array Data Bus is used when the mic-
roprocessor must read or write to registers in the
DMA gate array IC, including the DMA registers
and the free-running timer used to sequence be-
tween executive, DOC 0, and DOC 1 operations.
3-11.
READ/WRITE DATA BUS. The
Read/Write Data Bus is used to pass data to and
from the chosen DDC. External to the HOC, the
bus becomes the Read/Write Data Bus portion of
the Data/Control Interface Bus (DC-IB) linking
the HOC to the DDt's.
3-12. DATA/CONTROL INTERFACE BUS
The Data/Control Interface Bus (DC-IB) is the
communication link between the HOC and the
DDC's. The DC-IB consists of two independent
data buses -- a Control/Status Data Bus and a
Read/Write Data Bus.
The Control/Status Data Bus is used to send com-
mands to a DDC such that it can initiate the trans-
fer of information to or from the recording
medium, or it can be used to interrogate the status
of the DDC and its drive mechanism. A Con-
trol/Status Address Bus associated with the Con-
trol/status Data Bus provides an addressing
capability.
The Read/Write Data Bus is the path taken by all
the data which flows between the host computer
and the DOC. Details of these DC - IB signals, and
their associated select and strobe lines are given in
the following paragraphs.
3-7