Power-Up/-Down Sequence - Motorola ASTRO Digital Spectra Service Manual

Theory of Operation: Command Board
3.2.3

Power-Up/-Down Sequence

Normally, switched B+ (SWB+) enters the command board from P502, pin 31. This voltage is derived
from the battery A+ voltage which enters the control head through P502, pin 30. A power FET
transistor, located in the control head (W5 and W7 models), provides the means of controlling the
main power source via the control head's on/off switch.
When SWB+ or EMERG become active, the RPCIC EN output (U522, pin 15) goes to a logic low,
enabling the Switched +5-V and +9.6-V regulators of the RPCIC (U500). Approximately 220 ms after
the B+ is active (see Waveform W1), the power-on-reset (POR*) from U522, pin 40 switches to a
logic 1 state, enabling the microprocessor on the VOCON board. The microprocessor then
completes an initialization sequence and sets Row 5/5-V enable input to a logic low at P501, pin 15.
The input provides a low to the SIOIC to hold the 9.6-V enable on. Therefore, if SWB+ or EMERG go
inactive, the regulators will remain enabled until the microcontroller turns them off by returning the
9.6/5-V EN state to a logic high. (This is especially true with emergency, since the foot switch is
usually momentary.)
The emergency input is provided to enable the radio transceiver to be activated, regardless of the
state of the control head's on/off power switch. The emergency input (EMERG) is activated by
opening the normally grounded foot switch connected to either P502, pin3 or P503, pin 24. This input
is routed to the SIOIC (U522, pin 31) and is internally connected to a pull-up resistor within the IC to
provide the logic 1 state change.
This change is inverted through an exclusive OR gate within the IC, outputting a logic 0 at pin 30 and
the NOR gate input (internal to the IC) to enable the 9.6-V regulator. The logic low at pin 30 is
connected to a time-out timer, which latches the 9.6-V enable output for 100 ms. This delay is
required to allow the VOCON microprocessor to initiate its start-up vectors and poll the emergency
interrupt input from P501, pin 16. The microprocessor takes control of the 9.6 V (P501, pin 15),
holding it active low regardless of the states of other inputs.
The emergency active state depends on the emergency polarity (EMERG POL) input to the SIOIC
(U522, pin 32). When the jumper JU502 is installed, emergency is active with the foot switch open.
Removing JU502 causes the emergency to go active with the switch closed.
To turn off the radio, SWB+ is taken inactive (- Vdc) by pressing the on/off switch on the control head.
The microcontroller periodically audits the SWB+ at its input port (pin 20) to determine if it has
returned to a logic high. When it sees the logic high condition (caused by an inactive switch), the
microcontroller initiates the power-down sequence, turning the voltage regulators and the radio off.
68P81076C25-C
3-9
July 1, 2002