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PortC
PortB
PortA
(7:0)
(7:0)
PortD(7:0)
PortE(7:0)
PortF(7:0)
GPIO
VRGB
Video Port
(23:0)
Sync Decoder
Auto Image
VCLK, VPEN,
Optimizer
VVS, VHS,
Color Space
Converter HDCP
Field
GCLK, GFBK,
Graphics Port
GPEN, GVS,
GHS, GSOG
Sync Decoder
Auto Image
GRGB
Optimizer
(47:0)
Color Space
Converter HDCP
GCOAST,
GREF,
GBLKSPL,
GHSFOUT
RAMWE,
RAMOE,
ROMWE,
(7:0)
ROMOE
Processor ROM/
2-Wire
PWM
Serial
RAM Interface
Microprocessor Bus
Horizontal
Image
Scaler
CRISP
Image
Scaler
Video
Deinterlace
Spatial
Noise
Reduction
Figure 1-1 Internal Block Diagram
A(19:0),
D(15:0),
BHEN,
CPUTMS,
CS(1:0),
CPUTCK,
CPUTDO
CPUTDI
RD, WR
16-bit
Watchdog and
Turbo µP
Timers
Processor
Memory
Interface
SDRAM
Frame
Buffer
Frame
Buffer
Memory
Controller
MCLK DCLK UCLK
Dual PLL
Master Reset
Clock
Generator
MCLKEXT,
Reset
XI*
NMI
EXTINT
RxD, TxD
Interrupt
UART
Controller
OSD and CPU
SDRAM
OSD
Memory
Bus
OSD
Image
Control &
Scaler
Gamma Correction
Blend
CLTs, Color Space
PW181 Internal Block
Diagram
DCLKEXT,
*For internal clock generator
XO*
IRRCVR (1:0)
IR
Decoders
OSD/CPU
Memory
Controller
Display Port
RGBE
(23:0)
Color Matrix,
RGBO
Expander
(23:0)
DVS,
Display
DHS,
Timing
DEN,
Generator
DCLK
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