Intel 80C186EA Preliminary Information page 46

16-bit high-integration embedded processors
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80C186EA 80C188EA 80L186EA 80L188EA
INSTRUCTION SET SUMMARY
Function
ARITHMETIC (Continued)
IMUL
Integer multiply (signed)
e
Register-Byte
Register-Word
Memory-Byte
Memory-Word
IMUL
Integer Immediate multiply
e
(signed)
DIV
Divide (unsigned)
e
Register-Byte
Register-Word
Memory-Byte
Memory-Word
IDIV
Integer divide (signed)
e
Register-Byte
Register-Word
Memory-Byte
Memory-Word
AAM
ASCII adjust for multiply
e
AAD
ASCII adjust for divide
e
CBW
Convert byte to word
e
CWD
Convert word to double word
e
LOGIC
Shift Rotate Instructions
Register Memory by 1
Register Memory by CL
Register Memory by Count
AND
And
e
Reg memory and register to either
Immediate to register memory
Immediate to accumulator
TEST
And function to flags no result
e
Register memory and register
Immediate data and register memory
Immediate data and accumulator
OR
Or
e
Reg memory and register to either
Immediate to register memory
Immediate to accumulator
Shaded areas indicate instructions not available in 8086 8088 microsystems
NOTE
Clock cycles shown for byte transfers For word operations add 4 clock cycles for all memory transfers
46
(Continued)
Format
1 1 1 1 0 1 1 w
mod 1 0 1 r m
0 1 1 0 1 0 s 1
mod reg r m
1 1 1 1 0 1 1 w
mod 1 1 0 r m
1 1 1 1 0 1 1 w
mod 1 1 1 r m
1 1 0 1 0 1 0 0
0 0 0 0 1 0 1 0
1 1 0 1 0 1 0 1
0 0 0 0 1 0 1 0
1 0 0 1 1 0 0 0
1 0 0 1 1 0 0 1
1 1 0 1 0 0 0 w
mod TTT r m
1 1 0 1 0 0 1 w
mod TTT r m
1 1 0 0 0 0 0 w
mod TTT r m
TTT Instruction
0 0 0
ROL
0 0 1
ROR
0 1 0
RCL
0 1 1
RCR
1 0 0 SHL SAL
1 0 1
SHR
1 1 1
SAR
0 0 1 0 0 0 d w
mod reg r m
1 0 0 0 0 0 0 w
mod 1 0 0 r m
0 0 1 0 0 1 0 w
data
data if w
1 0 0 0 0 1 0 w
mod reg r m
1 1 1 1 0 1 1 w
mod 0 0 0 r m
1 0 1 0 1 0 0 w
data
data if w
0 0 0 0 1 0 d w
mod reg r m
1 0 0 0 0 0 0 w
mod 0 0 1 r m
0 0 0 0 1 1 0 w
data
data if w
80C186EA
Clock
Cycles
25–28
34–37
31–34
40–43
data
data if s
0
22–25
e
29–32
29
38
35
44
44–52
53–61
50–58
59–67
19
15
2
4
2 15
5
n 17
a
count
5
n 17
a
3 10
data
data if w
1
4 16
e
1
3 4
e
3 10
data
data if w
1
4 10
e
1
3 4
e
3 10
data
data if w
1
4 16
e
1
3 4
e
80C188EA
Comments
Clock
Cycles
25–28
34–37
32–34
40–43
22-25
29–32
29
38
35
44
44–52
53–61
50–58
59–67
19
15
2
4
2 15
n 5
n 17
n
a
a
a
n 5
n 17
n
a
a
a
3 10
4 16
3 4
8 16-bit
3 10
4 10
3 4
8 16-bit
3 10
4 16
3 4
8 16-bit
46

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