80C186Ea Pinout - Intel 80C186EA Preliminary Information

16-bit high-integration embedded processors
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80C186EA PINOUT

Tables 4 and 5 list the 80C186EA pin names with
package location for the 68-pin Plastic Leaded Chip
Carrier (PLCC) component Figure 9 depicts the
complete 80C186EA 80L186EA pinout (PLCC pack-
age) as viewed from the top side of the component
(i e contacts facing down)
Tables 6 and 7 list the 80C186EA pin names with
package location for the 80-pin Quad Flat Pack
(EIAJ) component Figure 6 depicts the complete
Address Data Bus
Name
Location
AD0
17
AD1
15
AD2
13
AD3
11
AD4
8
AD5
6
AD6
4
AD7
2
AD8 (A8)
16
AD9 (A9)
14
AD10 (A10)
12
AD11 (A11)
10
AD12 (A12)
7
AD13 (A13)
5
AD14 (A14)
3
AD15 (A15)
1
A16
68
A17
67
A18
66
A19 S6
65
NOTE
Pin names in parentheses apply to the 80C188EA 80L188EA
Table 4 PLCC Pin Names with Package Location
Bus Control
Name
Location
ALE QS0
61
BHE (RFSH)
64
S0
52
S1
53
S2
54
RD QSMD
62
WR QS1
63
ARDY
55
SRDY
49
DEN
39
LOCK
48
HOLD
50
HLDA
51
Power
Name
Location
V
26 60
SS
V
9 43
CC
80C186EA 80C188EA 80L186EA 80L188EA
80C186EA 80C188EA (EIAJ QFP package) as
viewed from the top side of the component (i e con-
tacts facing down)
Tables 8 and 9 list the 80C186EA 80C188EA pin
names with package location for the 80-pin Shrink
Quad Flat Pack (SQFP) component Figure 7 depicts
the complete 80C186EA 80C188EA (SQFP) as
viewed from the top side of the component (i e con-
tacts facing down)
Processor Control
Name
Location
RESIN
24
RESOUT
57
CLKIN
59
OSCOUT
58
CLKOUT
56
TEST BUSY
47
PDTMR
40
NMI
46
INT0
45
INT1 SELECT
44
INT2 INTA0
42
INT3 INTA1
41
IRQ
I O
Name
Location
UCS
34
LCS
33
MCS0 PEREQ
38
MCS1 ERROR
37
MCS2
36
MCS3 NCS
35
PCS0
25
PCS1
27
PCS2
28
PCS3
29
PCS4
30
PCS5 A1
31
PCS6 A2
32
T0OUT
22
T0IN
20
T1OUT
23
T1IN
21
DRQ0
18
DRQ1
19
15
15

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