Table of Contents
Advertisement
...................
~
. II ............ DMGrIpIIon ...
..... Memory
modules are initially addressed using the appropriate port address. However,
once configured,
they
are
addressed outside the·port selected' address
space.
Table 5-2 shows
the address space reserved for external
memory
modules.
Figure 5-2 shows the locations of the I/O ports for the Integral PC and two HP 82904A Bus
Expanders.
A1
I
A3
A2
I
A4
Bus Expander
.-.
AS
Computer
91
I
B3
I
92
I
B4
A
85.
I
B
-
.~
Bus Expander
. . . . . 1-1. 1/0 Port ....
aon.
1.8.2
Til. Ext.mal
1/0 Bus
The external I/O bus provides the link between the CPU and the external I/O devices plugged into
the I/O backplane. The bus can be divided into three parts: the physical address bus, the data bus,
and the control signals.
The
Ixt .... IIIO Ph,,,1 Add,. ...... laA
t Throug"
BAD).
This
bus is 23 bits wide and
is latched
by les U44, U4S, and U46 on the logic A PCA. BA23 is the most significant bit. The least significant
bit (AO), which distinguishes the upper byte from the lower byte
in
a 16-bit word,
is
not present on
the bus. In its place two signals,
NBUD and NBLD, are
prOvided. They specify whether the upper
byte, lower byte, or both bytes of the addressed word are involved in a cycle.
TIl. Ixterull/O
D ...
au.
,BDO Through
BD11).
This
is
a 16-bit bidirectional bus driven by
ICs
U53
and US4 on the logic
A PCA. The
upper (even) byte of the bus 'consists of
BDS through BOIS.
The
lower
(odd)
byte of the bus consists of
BDO through BD7.
The 1&1 .....
11/0
Control ......... These signals include:
BR/NW, NBUD, NBLO, NPSO, NPSI,
NBAS,
NBIMA,
NBDTACJ(,
NBRESET,
NBIRO through
NBIR3, NBDMARQ, GRIN,
and
GROUT. Ex-
cept for
GRIN
and
GROUT,
all of these signals are active low.
BR/NW is
the read/not write signal. This Signal, when high, indicates a read cycle; when low, it
indicates a write cycle on the data bus.
NBUD
and
NBLO
are the upper and lower data byte signals. If
NBUD is
low, an upper byte transfer
on the data bus is indicated. If NBLD
is
low, a lower byte transfer
is
indicated. If both signals are low,
a 16-bit
word
transfer is indicated.
Advertisement
Table of Contents
