Interface
5.6 Timing
5.6.1 PIO data transfer
Figure 5.9 shows of the data transfer timing between the device and the host
system.
Addresses
DIOR-/DIOW-
Write data
DD0-DD15
Read data
DD0-DD15
IORDY
Symbol
t0
Cycle time
t1
Data register selection setup time for DIOR-/DIOW-
t2
Pulse width of DIOR-/DIOW-
t2i
Recovery time of DIOR-/DIOW-
t3
Data setup time for DIOW-
t4
Data hold time for DIOW-
t5
Time from DIOR- assertion to read data available
t6
Data hold time for DIOR-
t9
Data register selection hold time for DIOR-/DIOW-
t10
Time from DIOR-/DIOW- assertion to IORDY "low" level
t11
Time from validity of read data to IORDY "high" level
t12
Pulse width of IORDY
5-146
t1
t2
t5
t10
t12
Timing parameter
Figure 5.9 PIO data transfer timing
t0
t9
t2i
t3
t4
t6
t11
Min.
120
25
70
25
20
10
—
5
10
—
0
—
Max.
Unit
—
ns
—
ns
—
ns
—
ns
—
ns
—
ns
50
ns
—
ns
—
ns
35
ns
—
ns
1,250
ns
C141-E202-01EN