Memory Mirrored Channel - IBM System x3650 M4 Type 7915 Problem Determination And Service Manual

Memory mirrored channel

Memory mirrored channel mode replicates and stores data on two pairs of DIMMs
within two channels simultaneously. If a failure occurs, the memory controller
switches from the primary pair of memory DIMMs to the backup pair of DIMMs. To
enable memory mirrored channel through the Setup utility, select System Settings
→ Memory. For more information, see "Using the Setup utility" on page 301. When
you use the memory mirrored channel feature, consider the following information:
v When you use memory mirrored channel, you must install a pair of DIMMs at a
v The maximum available memory is reduced to half of the installed memory when
v For UDIMMs, DIMM connectors 3, 6, 7, and 10 for microprocessor 1 and DIMM
The following diagram lists the DIMM connectors on each memory channel.
Figure 1. Connectors on each memory channel
The following table shows the installation sequence for memory mirrored channel
mode:
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IBM System x3650 M4 Type 7915: Problem Determination and Service Guide
Table 15. Non-mirroring (normal) mode DIMM installation sequence
Number of installed
microprocessor
One microprocessor
installed
Two microprocessors
installed
time. The two DIMMs in each pair must be identical in size, type, and rank
(single, dual, or quad), and organization, but not in speed. The channels run at
the speed of the slowest DIMM in any of the channels.
memory mirrored channel is enabled. For example, if you install 64 GB of
memory using RDIMMs, only 32 GB of addressable memory is available when
you use memory mirrored channel.
connectors 15, 18, 19, and 22 for microprocessor 2 are not used in memory
mirrored channel mode.
Microprocessor 2
Ch2 Ch3
CPU2
Table 16. Memory mirrored channel mode DIMM population sequence
Number of DIMMs
First pair of DIMMs
Second pair of DIMMs
Third pair of DIMMs
Fourth pair of DIMMs
Fifth pair of DIMMs
Sixth pair of DIMMs
Seventh pair of DIMMs
Eighth pair of DIMMs
DIMM connector population sequence
1, 4, 9, 12, 2, 5, 8, 11, 3, 6, 7, 10
1, 13, 4, 16, 9, 21, 12, 24, 2, 14, 5, 17, 8, 20, 11, 23, 3, 15,
6, 18, 7, 19, 10, 22
CH1 CH0 Ch2 Ch3
Number of installed
microprocessor
1
1
1
1
1
1
2
2
Microprocessor 1
CH1 CH0
CPU1
DIMM connector
1, 4
9, 12
2, 5
8, 11
3, 6
7, 10
13, 16
21, 24