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Sanyo DC-MP7500(BK)/(XE) Service Manual page 15

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IC BLOCK DIAGRAM & DESCRIPTION
IC190 M11L16161SA-45T (DRAM)
WE
RAS
CONTROL
LOGIC
CASL
CASH
CLOCK
GENERATOR
COLUMN
ADDRESS
10
BUFFER
A0
A1
A2
REFRESH
CONTROLER
A3
A4
A5
REFRESH
A6
COUNTER
A7
9
A8
A9
ROW
ADDRESS
10
BUFFER(10)
IC211 TA2149BFN (AM/FM 1 Chip Tuner IC)
FM
RF
AM
RF OUT
Vcc
RF IN
24
23
22
AM
MIX
FMRF
1
2
3
RF
FM
AM
GND
RF IN
LOW
CUT
10
10
FM
AM
OSC
OSC
21
20
AM
OSC
FM
OSC
BUFF
1/1 or
1/16
BUFF
FM
MIX
4
5
MIX
Vcc
OUT
DATA-IN BUFFER
COLUMN
10
DECODER
1024
16
SENSE AMPLIFIERS
I/O GATING
1024 x 16
1024 x 1024 x 16
MEMORY
1024
ARRAY
OSC
ST
IF
OUT
LED
REQ
19
18
17
IF
REQ
SW
ST
IF
BUFF
LEVEL
1/8
DET
AM
DET
AMIF
FMIF
6
7
8
AM
FM
GND
IF IN
IF IN
- 14 -
16
DATA-OUT
BUFFER
16
Vss
GENERATOR
DET
MPX
OUT
IN
LPF1
16
15
14
AF
AF
BUFF
VCO
DIVIDE
FM
ST/MO
DET
FM/AM
AGC
9
10
11
AGC
QUAD R-OUT
IO0
:
:
IO15
OE
Vcc
Vss
LPF2
13
DECODE
MJTE
12
L-OUT

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