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Sanyo DC-MP7500(BK)/(XE) Service Manual page 12

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IC BLOCK DIAGRAM & DESCRIPTION
IC120 TC9462F (Digital Servo Processor)
80
79
78
77
76
DVSR
81
RO
82
LPF
DVDD
83
DVR
84
LO
85
DVSL
86
TEST1
87
TEST2
88
TEST3
89
INTERFACE
BUS0
90
BUS1
91
BUS2
92
BUS3
93
VDD
94
VSS
95
BUCK
96
CCE
97
TEST4
98
TSMOD
99
RST
100
1
2
3
4
5
IC122 TC4052BF (Analog Switch)
V
DD
16
A
10
B
9
INH
6
8
V
SS
75
74
73
72
71
70
69
68
1 BIT
DAC
CLOCK
GENERATOR
ADDRESS
MICON
CIRCUIT
16k RAM
CORRECTION
CIRCUIT
DIGITAL OUT
AUDIO OUT
CIRCUIT
6
7
8
9
10
11
12
13
13 X-COMMON
12
OUT c IN
OUT c IN
14
15
OUT c IN
11
OUT c IN
OUT c IN
OUT c IN
OUT c IN
OUT c IN
7
V
EE
67
66
65
64
63
62
61
60
SERVO
CONTROL
DIGITAL
ROM
EQUALIZER
AUTOMATIC
ADJUSTMENT
RAM
CIRCUIT
CLV SERVO
SYNCHRONOUS
GUARANTEE
EFM DECODE
SUB CODE
DECODER
STATUS
14
15
16
17
18
19
20
21
IC170 PT8211S (Digital to Analog Converter)
0X
BCK
1
1X
2
WS
Data Latch
2X
3
DIN
3X
0Y
1
4
5
1Y
GND
2Y
2
4
3Y
Y-COMMON
3
BCK
1
8
RCH
WS
2
7
NC
DIN
3
6
LCH
GND
4
5
VDD
- 11 -
59
58
57
56
55 54 53 52 51
PWM
D/A
+
-
A/D
+
-
+
-
DATA
SLICER
VCO
+
PLL TMAX
-
22
23
24
25
26
27
28
29
OUT
+
Floating
DAC
op
Conversion
-
Vcc
OUT
+
op
-
Floating
DAC
Conversion
Pin Name
I/O
Description
BCK
I
Bit Serial Clock Input Pin
WS
I
Word Select Input Pin
DIN
I
Date Input Pin
GND
-
Ground
VDD
Power
Positive Power Supply
LCH
O
Left Channel Output Pin
NC
-
No Connection
RCH
O
Right Channel Output Pin
50
VREF
49
TRO
48
FDO
47
TEZI
46
TEI
45
TSIN
44
SBAD
43
FEI
42
RFRP
41
RFZI
40
RFCT
39
AVDD
38
RFI
37
SLCO
36
AVSS
35
VCOF
34
VCOREF
33
PVREF
32
LPFO
31
LPFN
30
8
RCH
7
NC
OUT
+
6
op
LCH
-
5
VDD
Pin No.
1
2
3
4
5
6
7
8

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