Sony HCD-HDX265 Service Manual page 39

6-10. SCHEMATIC DIAGRAM – MAIN Board (5/13) –
1 2 3
A
MAIN BOARD
(5/13)
B 39
M_ST
MAIN
BOARD
D3.3V
(8/13)
(Page 42)
C 14 D3.3V
DIAT
MAIN D-GND
BOARD
A5V
(7/13)
(Page 41)
CN606
19P
RD/MICCLK 1
D
TUNED 2
ST_CLK 3
ST_DO 4
ST_CE 5
ST_DI 6
5V 7
G A-GND 8
A12V 9
IO
E A_SEL0 10
BOARD
(1/2)
A_SEL1 11
CN306
A_SEL2 12
(Page 56)
TVSEL 13
V_SEL0 14
V_SEL1 15
V_SEL2 16
CLINK_RX_IN 17
F
CLINK_TX_OUT 18
CLINK_DET 19
G
H
CN625
18P
ASEL0 18
17
ASEL1
ASEL2 16
ASEL3 15
14
VSEL2
VSEL3 13
I
12
VSEL4
VSEL5 11
C R620 100 IODI
IODI 10
100 IODO
R621
9
IODO
SIRIPARA IOCLK
R622 100
BOARD IOCLK 8
CN625 R623 100 IOCE
IOCE 7
100 IORST
(Page 51) R624
6
IORST
R625 100
OCSW 5
J
4
D3.3V
D-GND 3
M+12V 2
1
M-GND
36
M+12V
MAIN
K
BOARD
(6/13)
(Page 40)
L
HCD-HDX265/HDX266/HDX267W/HDX465/HDX466/HDX665
See page 67 for Waveforms.
4 5 6 7 8
M_ST
R604 100 TUNED
R605 100 ST_CLK
R606 100 ST_DO
R607 100 ST_CE
R608 100 ST_DI
R502
R601 0
LED_LATCH 100
IOCE
IORST
R612
100
IODI
R613 100
IODO
R614 100
IOCLK
R637 100
MONO/ST_DET
R638 100
C505 0.01
A.CAL
KEY2
KEY1
D505
MC2836
KEY0
DIR_SDATA
DIR_SCLK
See page 69 for IC Block Diagrams. See page 77 for IC Pin Function Description.
9 10 11 12
R642
100
80 79 78 77 76 75 74 73 72 71 70 69 68
0
81 LED_LATCH
0(3.3)
82 V_SEL0
0(3.3)
83 V_SEL1
3.2(0)
84 IO_CE
3.3
IO_RESET
85
0(3.3)
86 IO_DI
0
87 IO_DO SYSTEM CONTROLLER
3.2
88 IO_CLK
M30622MGP-A58FPU0
3.3
R639 100
89 CLINK_DET
C504 0.01
R553 10k R515 1k 0
MONO/ST_DET
90
R516 1k 0
91 A.CAL MIC LEVEL
R504 R505 2.3
92 DESTINATION
R506 R507 47k 2.3
93 MODEL
R510 10k 3.3
R509 100
94 KEY2
C501
0.1 R512 10k R511 1k 3.3
KEY1
95
C508 0.1
C502 0.1
96 VSS 9
10k R513 1k
C503 0.1 R514 3.3
97 KEY0
1M 3.3
R501
98 VREF
3.3
C507 0.1
99 VCC
3.3
100 DIR_HDOUT
R504 R542
10k(HDX265:E) 10k
15k(HDX265:AUS)
47k(EXCEPT HDX265:E,AUS)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
R505
22k(EXCEPT HDX265:E,AUS)
47k(HDX265:E,AUS)
R506
3.3k(HDX266)
6.8k(HDX265/HDX267W)
15k(HDX465/HDX466)
47k(HDX665)
R519
10k
X501
5MHz
39 39
HCD-HDX265/HDX266/HDX267W/HDX465/HDX466/HDX665
13 14 15 16
R586
10k
R540
10k
R555
10k
C506
0.1
C518
0.1
67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
3.3 NS_INIT
50
3.3 LAT3
49
1.9(3.3) LAT2
48
DAMP INIT
3.3 LAT1
47
DAMP LATCH3 R558 10k
3.3
WRITE CE
DAMP LATCH2 46
IC501 3.3 OVF2
DAMP LATCH1
OVERFLOW2 45
3.3 OVF1
OVERFLOW1 44
3.1 DIAG
IC501
DRIVE_OCP(DIAG) 43
3.3
DRIVE_RST(EN) 42
R559 10k
3.2
P_CONT3 41
3.3
NO USE
P_CONT2 40
NO USE 3.3
P_CONT1 39
DVD_XIFBUSY 3.2 XSYSRST
MTK RST 38
3.2 XIFCS
DVD_SCO
DVD XIFCS 37
DVD_SOD
36
DVD_SID
35
XIFBSY
2.3
34
3.3 IFSCK
33
0 IFSDO
32
3.3 IFSDI
31
R557
47k
R556
47k
3.3 C520
R562
0.22
47k
0
Q503
2SC3052EF-T1-LEF
RESET SWITCH
R561
100k
17 18 19 20
(Page 35)
1
EN
EN
MAIN
DC-DET
BOARD
DC-DET
(1/13)
CSFLAG
CSFLAG
OVF2
OVF2
OVF1
OVF1
DIAG 2
DIAG
LAT3
LAT3
MAIN
LAT2
LAT2 BOARD
LAT1
(3/13)
LAT1
SHIFT (Page 37)
SHIFT
SCDT
SCDT
SOFT_MUTE
SOFT_MUTE
NS_INIT
NS_INIT
3
HPMUTE
HPMUTE
MAIN
BOARD
(4/13)
(Page 38)
EN
P_CONT3
P_CONT2
P_CONT1
P_CONT
D3.3V
E4V
E3.3V
BU3.3V
8
R563
10k
IC B/D
MAIN
BOARD
IC503 (6/13)
(Page 40)
RESET SIGNAL GENERATOR
IC503
PST3635NR
3.3 3.5
OUT Cd
3.9
VDD
GND NC
C521
0.01
C523 C522
0.1 0.22
D-GND
A5V
B
I2C_CLK
9
I2C_DATA
A-GND
MAIN
BOARD
A12V
(6/13)
M-GND
(Page 40)
C