System Components; Controller Chassis - HP XP P9500 Owner's Manual

3 System components

Controller chassis

The controller chassis provides system logic, control, memory, and monitoring, as well as the
interfaces and connections to the disk drives and the host servers. The controller chassis consists
of the following components:
Table 14 Controller chassis
Item
Name
CHA
DKA
Switches
Service
processor
(SVP)
Hub
ESW
Processor
Blades
Cache memory
adapter (CPC)
54 System components
Min Max
2 8 if 4 DKAs installed.
12 if no DKAs
installed.
0 with no drives2 4
with drives
2 4
1 2
1 2
2 4
2 4
2 4
Description
.
A CHA is an interface board that provides connection to
the host servers. It provides the channel interface control
functions and intercache data transfer functions between the
disk array and the host servers. It converts the data format
between CKD and FBA. The CHA contains an internal
processor and 128 bytes of edit buffer memory.
A DKA is an interface board that provides connection to the
disk drives and SSDs. Provides the control functions for data
transfer between drives and cache. The DKA contains DRR
(Data Recover and Reconstruct), a parity generator circuit.
It supports eight FIBRE path and offers 32 KB of buffer for
each FIBRE path.
The full duplex switches serve as the data interconnection
between the CHAs, DKAs, and cache memory. They also
connect the control signals between the Micro Processor
Blade (microprocessors) and the cache memory.
A custom PC that implements system configuration settings
and monitors the system operational status. Connecting the
SVP to service center enables the storage system to be
remotely monitored and maintained by the HP support team.
This significantly increases the level of support that HP can
provide to its customers.
NOTE: The SVP also provides a communication hub for
the 3rd and 4th Processor blade in Module-0. The SVP is
installed only in Module-0 only (system 0).
In a system with two SVPs, both are installed in the controller
chassis in system 0
Connects the switches, adapters, and service processor.
NOTE: The Hub provides communication connection for
3rd and 4th Processor blade in Module-0. The Hub is
installed in Module- 1 only.
The full duplex switches serve as the data interconnection
between the CHAs, DKAs, and CMs. They also connect the
control signals between the P9500s (microprocessors) and
the CM boards.
Quad core, 2.33 GHz processors are independent of the
CHAs and DKAs and can be shared across CHAs and DKAs
The cache is an intermediate buffer between the channels
and drives. Each cache memory adapter has a maximum
capacity of 32 GB. An environmentally friendly nickel
hydride battery and up to two Cache Backup Memory Solid
States Disk drives are installed on each Cache Memory
Adapter board. In the event of a power failure, the cache