Parallel Interface
Pin
Return
number
pin
number
14
—
15
—
16
—
17
—
18
—
19–30
—
31
—
C-4
Table C–1 Parallel interface signals (Continued)
Signal
Direction
Compatible mode
Nibble mode
Auto Feed XT
Input
Host Busy
—
Signal Ground
(SG)
Frame Ground
(FG)
+5V
Output
Signal Ground
(SG)
Input Prime
Input
(INPRM)
Description
Not used
Reverse data transfer phase:
This signal is set low when the host can
receive data, and goes high when the
host has received data. Following a
reverse data transfer, the interface enters
the reverse idle phase when the Host
Busy signal goes low and the printer has
no data.
Reverse idle phase:
This signal goes high when the Printer
Clock signal goes low so that the
interface re-enters the reverse data
transfer phase. If it goes high with the
1284 Active signal low, the idle phase is
aborted and the interface returns to the
compatibility mode.
—
No connection
—
Logic ground level (0 V)
—
Printer chassis ground line. FG and SG
are connected.
+5V source (up to 300 mA)
—
Twisted-pair return lines
If this signal is low for more than 50 µs,
the printer is reset to initial status and
placed online.
User's Manual