Printhead Drive Circuit - Epson SQ-1170 Service Manual

REV.-A

2.3.6 Printhead Drive Circuit

Figure 2-43 shows the printhead drive circuit.
The print data developed by CPU is transferred to the head control gate array - E05A65 (ICI 2) via data
bus. The data for 48 nozzles stored in E05A65 is serially transmitted from HDDAT port to the head
driver - ~PD 1632 (IC8,9). HDCLK is a clock for this serial transmission. The E05A65 transmits HDSTB
signal as soon as the data transmission for 48 nozzles is completed.
The head is controlled by CHG and DSCHG pulses.
VH supply
circuit
Thermistor
The printhead drive circuit can be divided into two circuits: Charge/discharge circuit and Printhead "",
voltage supply circuit.
CPU Bus
E
PTS
E05A48 (IC1O)
Figure 2-43. Printhead Drive Circuit
r
ALDCHG
B
- - -
A
Charge
Circuit
2-34
uPDI 6322
1
I
Print
head
I
I
I
I
I
I