Monitoring The Memory Subsystem In Netware; Tips And Tricks - HP ML570 - ProLiant - G2 Tuning Manual

Novell NetWare 6 performance tuning guidelines for ProLiant servers
monitoring the
memory subsystem in
NetWare 6

tips and tricks

table 7. types of memory technology
type
extended data out (EDO)
Synchronous Dynamic
Random Access Memory
(SDRAM)
double data rate (DDR)
In NetWare 6, use the NetWare Monitor and/or the all-inclusive NRM utility to check the
status of the memory parameters. These utilities provide clues as to whether there is a
memory bottleneck in your system. The following parameters apply to only the traditional
file system. For NSS values, refer to the NSS section in this document.
long term cache hit – cumulative percentage of the system memory since last started.
LRU setting time – measures the length of time it takes for a cache buffer at the head
of the list to make its way down to the tail, where it becomes the LRU buffer.
SWAP activities – monitors the rate at which data is being moved from memory to
disk.
Use the following tips to improve the disk subsystem performance:
Use the NRM or the NetWare monitor utility to regularly monitor total memory
available and cache statistics.
Set the long term cache hit counter range to be within 90% to 100%.
Set the LRU setting time to greater or equal to15 minutes.
Use the Swap utility to monitor virtual memory performance. If the overall system
memory is running low, swapping does occur more often.
Add more memory, if swapping or disk thrashing is taking place due to insufficient
system memory.
description
This memory technology was first introduced early in
the year 1994 as an improvement over Fast Page
Mode (FPM) memory technology. The clock rate was
40 MHz with a max bandwidth of 320 MB/s.
This memory technology was first introduced in the
early 1996 at 66 MHz. The 100 MHz version was
introduced in the year1998 and in the year 1999,
133 MHz version was introduced. The unbuffered
DIMMs though slightly faster than the register
DIMMs has limitation in the number of DIMMs that
can be interconnected on a bus due to electrical
loading. The registered DIMMs on the other hand
have lighter electrical load requirements and thus
more DIMMs can be interconnected on a bus.
Introduced in the year 2000 as DDR SDRAM (100
MHz / 133 MHz). In theory DDR is capable of
transferring data on both the rising and falling
edges of the clock.
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