5
No.
107
XTLOAD
108
EVEN/ODD
109
XCLKIN
110
CLKIN
111
SYNCIN1
112
SYNCIN2
113
CLPIN
114
DV
115
DGNDPLL
116
AV
117
AGNDVCO
118
RC1
119
RC2
120
AV
121
IREF
123
AGNDIR
124
G/YIN1
125
AV
126
G/YIN2
127
AGNDAMPG
128
G/YCLP
129
B/CbCLP
130
R/CrCLP
132
SOGIN1
133
B/CbIN1
134
AV
135
SOGIN2
136
B/CbIN2
137
AGNDAMPB
139
R/CrIN1
140
AV
141
R/CrIN2
142
AGNDAMPR
143
G/YOUT
144
DAC TEST OUT
14, 102, 122, 131, 138
DPGND
5
6
Symbol
I/O
I
Programmable counter reset setting
I
Inverted pulse input of ADC sampling CLK
I
Inverted CLK input for testing
I
CLK input for testing
I
Sync input 1
I
Sync input 2
I
Clamp pulse input
−
PLL
Digital power supply for PLL
CC
−
Digital GND for PLL
−
VCO
Analog power supply for PLL VCO
CC
−
Analog GND for PLL VCO
−
External pin for PLL loop filter
−
External pin for PLL loop filter
−
IR
Analog power supply for IREF
CC
I
Current setup
−
Analog GND for TREF
I
G/Y signal input 1
−
AMPG
Power supply for G/Y amplifier block
CC
I
G/Y signal input 2
−
GND for G/Y amplifier block
−
Clamp capcitor for brightness
−
Clamp capcitor for brightness
−
Clamp capcitor for brightness
I
SYNC ON GREEN signal input 1
I
B/Cb signal input 1
−
AMPB
Power supply for B/Cb amplifier block
CC
I
SYNC ON GREEN signal input 2
I
B/Cb signal input 2
−
GND for B/Cb amplifier block
I
R/Cr signal input 1
−
AMPR
Power supply for R/Cr amplifier block
CC
I
R/Cr signal input 2
−
GND for R/Cr amplifier block
O
Monitor pin for amplifier output signal
O
DAC testing output for amplifier block control register
−
GND
PDP-434CMX
6
7
Pin Function
7
8
A
B
C
D
E
F
143
8