Pioneer 434CMX - PDP - 43" Plasma Panel Service Manual page 136

Service manual
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1
Pin Function
No.
Pin Name
A
1
HSCTL
2
C/HSYNC IN
3
VIDEO IN
B
4
VSEPA
5
VSYNC IN
6
CVPOL
7
CVEXI
C
8
CPSEL
9
GND
10
CPWID
11
VDRV
D
12
CLAMP
13
HDRV
14
Vcc
15
EXIV
16
POLV
E
17
EXIH
18
POLH
F
136
1
2
HDRV output
Used to select whether to output the VDRV section of the HDRV output signal.
High : VDRV section of HDRV is output
Low : VDRV section of HDRV is not output
Composite sync / H SYNC input
Input either the composite synchronization signal or the horizontal synchronization signal.
Input is clamped, and is initiated by capacitor coupling.
SYNC ON VIDEO input
Inputs the SYNC ON VIDEO signal(green).
Input is sink chip clamped.
Input is initiated by capacitor coupling.
f-V conversion
Converts the horizontal synchronization signal frequency into a voltage.
The voltage generated is proportional to the frequency of the horizontal synchronization signal.
Attach a 0.56 µF capacitor between the ground pins.
V SYNC input Inputs the vertical synchronization signal.
Vertical polarity integration
Integrates the vertical synchronization signal polarity detection circuit.
Attach a 1.5 µF capacitor between this pin and the ground.
Vertical existence integration
Integrates the vertical synchronization signal existence detection circuit.
Attach a 1 µF capacitor between this pin and the ground.
Setting the clamp position
Used to set the clamp pulse generation position to either the front or back edge of HSYNC
High : The front edge is the generation position
Open : Composite / H SYNC IN : The front edge is the generation position
VIDEO IN : The back edge is the generation position
Low : The back edge is the generation position
Ground
Setting the clamp pulse width
Sets the clamp pulse width according to the attached time constant.
Attach a resistor between this pin and VCC and, a capacitor between this pin and GND.
When R = 3.9kΩ and C = 100pF, pulse width is approximately 400 ns.
Set the resistor to register an abnormality at 1kΩ.
VDRV output
Outputs the vertical synchronization signal.
The output signal has positive polarity.
Clamp output
Outputs the clamp pulse generated from the vertical synchronization signal.
The output signal has a positive polarity.
HDRV output
Outputs the clamp pulse generated from the horizontal synchronization signal.
The output signal has positive polarity.
Power supply
Vertical existence output
Indecates whether the vertical synchronization signal exists.
Vertical polarity output
Indicates the polarity of the vertical synchronization signal.
Horizontal existence output
Indicates whether the horizontal synchronization signal exists.
Horizontal polarity output
Indicates the polarity of the horizontal synchronization signal.
PDP-434CMX
2
3
Pin Function
3
4
4

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