Pioneer MJ-D707 Service Manual page 58

MJ-D707, MJ-17D
BD7910FV (IC116: CORE MAIN UNIT ASSY)
Head Driver
Block Diagram
20 19 18 17
1 2 3 4
Pin Function
No. Name
1 VregIN Regulator input and regulator power supply
2 RegGND Regulator GND
3 RegSEL Regulator selection terminal
4 VG Power MOS drive voltage input
5 SVCC EFM high-level output voltage
BR93LC56F (IC110: CORE MAIN UNIT ASSY)
EEPROM
Pin Assignment (Top view)
NC 1
Vcc 2
CS 3
SK 4
Pin Function
No. Name
1 NC Not connected
2 Vcc Power supply
3 CS Chip selection input
4 SK Serial clock input
5 DI Start bit, operation code, address, and serial data input
6 DO Serial data output, READY/BUSY internal status indication
output
7 GND Ground
8 NC Not connected
58
15 14 13 12
16 11
Pre Driver
5 6 7 8 9 10
Description
NC
8
GND
7
DO
6
DI
5
Description
No. Name
6 PDGND Predrive GND
7 EFM EFM signal input
8 MUTE Mute control
9 N.C.
10 N.C. Not used
11 N.C.
12 VOD2 Sink output (lower side power MOS drain)
13 VSS H-bridge GND (lower side power MOS source)
14 VOD1 Sink output (lower side power MOS drain)
15 VOS1 Source output (upper side power MOS source)
16 VDD H-bridge power supply (upper side power MOS drain)
17 VOS2 Source output (upper side power MOS source)
18 RegDRV External PNP drive output for the regulator
19 RegOUT Regulator output (emitter follower output)
20 RegNF Regulator feedback terminal
Block Diagram
High
NC 1
Voltage
Generation
Write
Inhibit
2
Vcc
Order Decode
Control
Clock Generation
CS 3
SK 4
Description
2048bits
EEPROM Array
8
Address
R/W
Decoder Amp.
7
Address Data
Buffer Register
Order
Dummy
Register
Bit
6
5
NC
GND
DO
DI