Dma Channels; Pci Interrupt Routing Map - Intel BLKD865GSAL Technical Product Specification

Product specification
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2.5

DMA Channels

Table 19. DMA Channels
DMA Channel Number
0
1
2
3
4
5
6
7
2.6

PCI Interrupt Routing Map

This section describes interrupt sharing and how the interrupt signals are connected
between the PCI bus connectors and onboard PCI devices. The PCI specification
specifies how interrupts can be shared between devices attached to the PCI bus. In
most cases, the small amount of latency added by interrupt sharing does not affect the
operation or throughput of the devices. In some special cases where maximum
performance is needed from a device, a PCI device should not share an interrupt with
other PCI devices. Use the following information to avoid sharing an interrupt with a
PCI add-in card.
PCI devices are categorized as follows to specify their interrupt grouping:
INTA: By default, all add-in cards that require only one interrupt are in this
category. For almost all cards that require more than one interrupt, the first
interrupt on the card is also classified as INTA.
INTB: Generally, the second interrupt on add-in cards that require two or more
interrupts is classified as INTB. (This is not an absolute requirement.)
INTC and INTD: Generally, a third interrupt on add-in cards is classified as INTC
and a fourth interrupt is classified as INTD.
The ICH5 has eight Programmable Interrupt Request (PIRQ) input signals. All PCI
interrupt sources either onboard or from a PCI add-in card connect to one of these
PIRQ signals. Some PCI interrupt sources are electrically tied together on the board
and therefore share the same interrupt. Table 20 shows an example of how the
PIRQ signals are routed.
For example, using Table 20 as a reference, assume an add-in card using INTA is
plugged into PCI bus connector 3. In PCI bus connector 3, INTA is connected to
PIRQB, which is already connected to the ICH5 audio controller. The add-in card in PCI
bus connector 3 now shares an interrupt with the onboard interrupt source.
Data Width
8 or 16 bits
8 or 16 bits
8 or 16 bits
8 or 16 bits
8 or 16 bits
16 bits
16 bits
16 bits
Technical Reference
System Resource
Open
Parallel port
Diskette drive
Parallel port (for ECP or EPP)
DMA controller
Open
Open
Open
51

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