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BG18.
Performance Monitor Event SEGMENT_REG_LOADS Counts Inaccurately
Problem:
The
performance
instructions that load new values into segment registers. The value of the count may be
inaccurate.
Implication: The performance monitor event SEGMENT_REG_LOADS may reflect a count higher or
lower than the actual number of events.
Workaround:None identified.
Status:
For the steppings affected, see the Summary Tables of Changes.
BG19.
#GP on Segment Selector Descriptor That Straddles Canonical Boundary May
Not Provide Correct Exception Error Code
Problem:
During a #GP (General Protection Exception), the processor pushes an error code on to
the exception handler's stack. If the segment selector descriptor straddles the
canonical boundary, the error code pushed onto the stack may be incorrect.
Implication: An incorrect error code may be pushed onto the stack. Intel has not observed this
erratum with any commercially-available software.
Workaround:None identified.
Status:
For the steppings affected, see the Summary Tables of Changes.
BG20.
Improper Parity Error Signaled in the IQ Following Reset When a Code
Breakpoint Is Set on a #GP Instruction
Problem:
While coming out of cold reset or exiting from Deep Power Down Technology (code
name C6 state), if the processor encounters an instruction longer than 15 bytes (which
causes a #GP) and a code breakpoint is enabled on that instruction, an IQ (Instruction
Queue) parity error may be incorrectly logged resulting in an MCE (Machine Check
Exception).
Implication: When this erratum occurs, an MCE may be incorrectly signaled.
Workaround:None identified.
Status:
For the steppings affected, see the Summary Tables of Changes.
24
monitor
event
SEGMENT_REG_LOADS
Errata
(Event
06H)
counts
Specification Update
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