Beep Codes For System Board Errors; Bios Beep Codes - NEC VERSA 6000 Series Service Manual

3-6 Troubleshooting and Repair

Beep Codes for System Board Errors

The following table provides system beep codes.
Beep Diagnostic
Code
Code
none 01h
02h
1-1-3
03h
1-1-4
04h
1-2-1
1-3-1 08h
none 09h
1-3-3 0Ah
1-4-2 0Dh
Table 3-3 BIOS Beep Codes
Description
CPU registers test in
progress or failure
CMOS write/read test in
progress or failure.
ROM BIOS checksum test
in progress or failure.
Programmable interval
timer 0 test in progress or
failure.
RAM refresh verification
test in progress or failure.
First 64K RAM test in
progress.
First 64K RAM chip or
data line failure, multi-bit.
Parity failure first 64K
RAM
Test Performed
Pattern test of most of the 16-bit CPU
registers. Failure will result in a system
halt.
Rolling ones test in the shutdown byte
(offset 0Eh) of the CMOS RAM. Failure
will result in a system halt.
The range of ROM that includes the
BIOS is checksummed. Failure will
result in a system halt.
Over a period of time, the current count
values in timer 0 are read and
accumulated by ORing them into the
values read so far. It is expected that
during the time period, all bits are set.
Over a period of time, the refresh bit
(bit 4) in port 60h is read and tested.
The refresh bit should toggle from 0 to
1, then 1 to 0 within the time period.
Failure will result in system halt.
No specific test is performed - just
indicates that the test is beginning .
The first 64K of RAM is tested with a
rolling ones test and a pattern test. If
any of the pattern tests fail, then the
BIOS reports that multiple data bits
failure. Failure results in a system halt.
At the completion of the rolling ones
and pattern tests of the first 64K, the
BIOS checks the parity error bits (bits 7
and 6) of port 60h. Failure results in a
system halt.