Cmos Memory/Real-Time Clock Battery; Dma/Irq Settings; Table 1-5 Interrupt Level Assignments - NEC DIRECTION L Service Manual

1-8 Technical Information

CMOS Memory/Real-Time Clock Battery

The 82371AB PCI ISA IDE Xcelerator (PIIX4) on the system board stores system
information in non-volatile CMOS memory. The chip also contains the system's real-time
clock. Both are maintained by a 3-volt coin cell lithium battery on the system board. The
battery is replaceable.

DMA/IRQ Settings

The system automatically configures interrupts requests (IRQ), direct memory access
(DMA) channels, and other parameters when adding PCI boards with minimal user
intervention.
Table 1-5 and Table 1-6 list system IRQ and DMA default settings.
IRQ
NMI
00
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
* Default; setting can be changed.

Table 1-5 Interrupt Level Assignments

System Resource
I/O channel check
Reserved, internal timer
Reserved, keyboard buffer full
Reserved, cascade interrupt from slave PIC
COM2*
COM1*
LPT2 (Plug and Play option)/Audio/User available
Diskette drive
LPT1*
Real-time clock
Reserved
User available
Windows Sound System*/User available
Onboard mouse port (if present, else user available)
Reserved, math coprocessor
Primary IDE (if present, else user available)
Secondary IDE (if present, else user available)