Related Manuals for Phytec PCL-063
Summary of Contents for Phytec PCL-063
- Page 1 Compatibility Guide - PCL‑063 (phyCORE‑i.MX 6UL/ ULL) and PCL‑077 (phyCORE‑i.MX 91/93) (LAN-114e.A0) A Product of PHYTEC Technology Holding Company...
- Page 2 Compatibility Guide - PCL‑063 (phyCORE‑i.MX 6UL/ULL) and PCL‑077 (phyCORE‑i.MX 91/93) (LAN-114e.A0) Compatibility Guide - PCL‑063 (phyCORE‑i.MX 6UL/ULL) and PCL‑077 (phyCORE‑i.MX 91/93)(LAN-114e.A0) Document Title Compatibility Guide - PCL‑063 (phyCORE‑i.MX 6UL/ULL) and PCL‑077 (phyCORE‑i.MX 91/93)(LAN-114e.A0) Document Type Hardware Compatibility Guide Article Number LAN-114e.A0 Release Date 05.03.2024 Is Branch of Compatibility Guide - PCL‑063 (phyCORE‑i.MX 6UL/ULL) and PCL‑077 (phyCORE‑i.MX...
- Page 3 PHYTEC Messtechnik GmbH reserves the right to alter the information contained herein without prior notification and accepts no responsibility for any damages that might result.
- Page 4 Compatibility Guide - PCL‑063 (phyCORE‑i.MX 6UL/ULL) and PCL‑077 (phyCORE‑i.MX 91/93) (LAN-114e.A0) INDIA CHINA Address: PHYTEC Embedded Pvt. Ltd PHYTEC Information Technology (Shenzhen) No. 1688, 25th A Cross Co. Ltd. 27th Main, 2nd Sector, Opp. PEP School 2106A, Block A, Tianxia Jinniu Square...
- Page 5 Compatibility Guide - PCL‑063 (phyCORE‑i.MX 6UL/ULL) and PCL‑077 (phyCORE‑i.MX 91/93) (LAN-114e.A0) Introduction The purpose of this guide is to show how to migrate between the phyCORE-i.MX 6UL/ULL to phyCORE-i.MX 91/93 in your applications. In this guide, we highlight the necessary parameters, signals, and power consumption to ensure a smooth migration between the two SoMs. ...
- Page 6 Compatibility Guide - PCL‑063 (phyCORE‑i.MX 6UL/ULL) and PCL‑077 (phyCORE‑i.MX 91/93) (LAN-114e.A0) Overview The two SOMs, phyCORE-i.MX 6UL/ULL and phyCORE-i.MX 91/93, are mechanically footprint-compatible. They can be substituted for each other if certain electrical parameters are met. This document is intended to guide you through a carrier board design, that will accommodate either the phyCORE-i.MX 6UL/ULL or the phyCORE-i.MX 91/93.
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Page 7: Compatibility Mode
GBit Ethernet and High Speed SD Card Interface but it will also break most of the compatibility to phyCORE-i.MX 6UL/ULL. The table below will show the differences between phyCORE-i.MX 6UL/ULL (PCL-063) and phyCORE-i.MX 91/93 (PCL-077) in either Compatibility or Full Feature Mode. The different voltages of the interfaces are resembled by the different font colors. - Page 8 Compatibility Guide - PCL‑063 (phyCORE‑i.MX 6UL/ULL) and PCL‑077 (phyCORE‑i.MX 91/93) (LAN-114e.A0) i.MX 6UL/ULL Default Feature i.MX 91 Compatibility Mode i.MX 93 Compatibility Mode i.MX 91 Full Feature Mode i.MX 93 Full Feature Mode J13, J14 = 1+2 (3.3 V IO voltage) J13, J14 = 2+3 (1.8 V IO voltage) Use for 1GBit ETH operation Use for 1GBit ETH operation 1x A7 @900Mhz...
- Page 9 Compatibility Guide - PCL‑063 (phyCORE‑i.MX 6UL/ULL) and PCL‑077 (phyCORE‑i.MX 91/93) (LAN-114e.A0) Dedizierte GPIO Dedizierte GPIO Dedizierte GPIO Dedizierte GPIO Dedizierte GPIO I2C1 UART5 UART UART UART UART USB1 USB1 USB1 USB1 USB1 USB2 USB2 USB2 USB2 USB2 JTAG /Audio JTAG JTAG JTAG JTAG VCC 3,3V VCC 3,3V...
- Page 10 Compatibility Guide - PCL‑063 (phyCORE‑i.MX 6UL/ULL) and PCL‑077 (phyCORE‑i.MX 91/93) (LAN-114e.A0) CSI/ UART3 UART2 UART2 UART2 UART2 CAN1/UART3 CAN1 FD CAN1 FD CAN1 FD CAN1 FD GPIO1.3/ADC1_IN3 ADC0 ADC0 ADC0 ADC0 Boot Pins Boot Pins Boot Pins Boot Pins Boot Pins Tamper Pins Tamper Pins Tamper Pins Tamper Pins ...
- Page 11 Compatibility Guide - PCL‑063 (phyCORE‑i.MX 6UL/ULL) and PCL‑077 (phyCORE‑i.MX 91/93) (LAN-114e.A0) Special Dependencies for Display and Camera Signals Because of the changed muxing options in i.MX 91/93 processor compared to the i.MX 6UL/ULL muxing, things like functions, display, and camera signals have special dependencies. The following table gives you a short overview. More detailed information will follow in the sections below.
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Page 12: Parallel Camera Interface
Compatibility Guide - PCL‑063 (phyCORE‑i.MX 6UL/ULL) and PCL‑077 (phyCORE‑i.MX 91/93) (LAN-114e.A0) Compatibility Description This section lists all the interfaces available on the phyCORE-i.MX 6UL/ULL and describes the impact of replacing PCL-063 with PCL-077. Solutions to make them compatible are also given. Parallel Camera Interface phyCORE-i.MX 6UL/ULL phyCORE-i.MX 91/93... -
Page 13: Sd Card Interface
PCB can support higher frequencies. Respective IO levels of signals X_SD2_RESET and X_SD2_CD must be considered. It is recommended to use the phyBOARD-Segin (PBA-CD-10) as a reference for new designs. Please contact support@phytec.de for schematics. SD2 Interface phyCORE-i.MX 6UL/ULL phyCORE-i.MX 91/93... - Page 14 Compatibility Guide - PCL‑063 (phyCORE‑i.MX 6UL/ULL) and PCL‑077 (phyCORE‑i.MX 91/93) (LAN-114e.A0) 10/100Mbit Ethernet Interface on SOM phyCORE-i.MX 6UL/ULL phyCORE-i.MX 91/93 SOM Pins X1-[12:19] involved Info 10/100Mbit Ethernet PHY on 10/100Mbit Ethernet PHY on SOM connected to ENET2 SOM connected to ENET1 interface interface...
- Page 15 Compatibility Guide - PCL‑063 (phyCORE‑i.MX 6UL/ULL) and PCL‑077 (phyCORE‑i.MX 91/93) (LAN-114e.A0) Second Ethernet Interface phyCORE-i.MX 6UL/ULL phyCORE-i.MX 91/93 SOM Pins X1-[52:59] X1-[52:59] involved Additional X1-[50:51] SOM pins X1-[60:61] involved Info Second Ethernet MAC interface A second Ethernet MAC interface is available with an RGMII available with RMII signal set.
- Page 16 Compatibility Guide - PCL‑063 (phyCORE‑i.MX 6UL/ULL) and PCL‑077 (phyCORE‑i.MX 91/93) (LAN-114e.A0) I2C1 Interface phyCORE-i.MX 6UL/ULL phyCORE-i.MX 91/93 SOM Pins X1-[60:61] involved Info I2C1 interface is available for I2C Signals are available via FLEX-IO emulation. connecting external I2C Effect: Since a FLEX-IO unit is used to emulate the I2C devices.
- Page 17 Compatibility Guide - PCL‑063 (phyCORE‑i.MX 6UL/ULL) and PCL‑077 (phyCORE‑i.MX 91/93) (LAN-114e.A0) USB_OTG1 Interface phyCORE-i.MX 6UL/ULL phyCORE-i.MX 91/93 SOM Pins X1-[65:68] involved X1-97 Info USB-OTG1 interface with USB-OTG1 interface without Charge Detect signal available Charged Detect (CHD) signal on SOM connector. available Effect: No dedicated Charge Detect signal.
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Page 18: Jtag Interface
Compatibility Guide - PCL‑063 (phyCORE‑i.MX 6UL/ULL) and PCL‑077 (phyCORE‑i.MX 91/93) (LAN-114e.A0) CCM CLK Interface phyCORE-i.MX 6UL/ULL phyCORE-i.MX 91/93 SOM Pins X1-[72:73] involved Info High-speed differential input/ Single-ended output clocks available output clock interface Effect: No differential clock interface available, only two available single-ended output clocks Workaround: If the carrier board provides differential input... - Page 19 Compatibility Guide - PCL‑063 (phyCORE‑i.MX 6UL/ULL) and PCL‑077 (phyCORE‑i.MX 91/93) (LAN-114e.A0) SOM Control Interface phyCORE-i.MX 6UL/ULL phyCORE-i.MX 91/93 SOM Pins X1-[98:102] involved Info SOM 3.3V logic control SOM Control interface available with 1.8V logic interface available Effect: For all signals intended to be pulled to GND, no effect is expected.
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Page 20: Power Interface
Compatibility Guide - PCL‑063 (phyCORE‑i.MX 6UL/ULL) and PCL‑077 (phyCORE‑i.MX 91/93) (LAN-114e.A0) POWER Interface phyCORE-i.MX 6UL/ULL phyCORE-i.MX 91/93 Main Power Supply SOM pins X1-[90:93] involved Info 3.3V power directly to SOM and 3.3V SOM power must be supplied first, peripheral power peripherals must follow the SOM power-up sequence Effect: Power up of peripherals connected to SOM must be... -
Page 21: Uart1 Interface
Compatibility Guide - PCL‑063 (phyCORE‑i.MX 6UL/ULL) and PCL‑077 (phyCORE‑i.MX 91/93) (LAN-114e.A0) BOOT Mode Interface phyCORE-i.MX 6UL/ULL phyCORE-i.MX 91/93 SOM Pins X1-[25:49] X1-107 involved X1-[103:104] X1-109 X1-111 X1-116 Info Boot configuration: The Boot configuration is reduced to four IO signals which BOOTCFG[1:2,4] are latched during RESET. The boot mode interface X1-[25:49] ... - Page 22 Compatibility Guide - PCL‑063 (phyCORE‑i.MX 6UL/ULL) and PCL‑077 (phyCORE‑i.MX 91/93) (LAN-114e.A0) ECSPI3 / UART2 Interface phyCORE-i.MX 6UL/ULL phyCORE-i.MX 91/93 SOM Pins X1-[109:112] involved Info ECSPI3 / UART2 interface The SPI interface function is given as a dedicated IP core available on SOM connector with compatibility with the SOM connector pins, but there is no dedicated UART interface available on the same pins of the SOM connector.
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Page 23: Gpio Interface
Compatibility Guide - PCL‑063 (phyCORE‑i.MX 6UL/ULL) and PCL‑077 (phyCORE‑i.MX 91/93) (LAN-114e.A0) GPIO Interface phyCORE-i.MX6 UL/ULL phyCORE-i.MX 91/93 SOM Pins X1-51 involved X1-78 X1-[85:88] X1-[95:96] X1-106 Info Multiple GPIO pins are Several GPIO pins are available via the processor GPIO available for use controller, additionally FLEXIO controller is available for support of additional functions. - Page 24 Compatibility Guide - PCL‑063 (phyCORE‑i.MX 6UL/ULL) and PCL‑077 (phyCORE‑i.MX 91/93) (LAN-114e.A0) TAMPER Interface phyCORE-i.MX6 UL/ULL phyCORE-i.MX 91/93 SOM Pins X1-51 X1-2 involved X1-[85:88] X1-104 X1-95 Info Multiple GPIO5 pins available Two dedicated TAMPER pins are available on i.MX 91/93 for the TAMPER function Effect: TAMPER pins are located on different pins of the SOM.
- Page 25 Compatibility Guide - PCL‑063 (phyCORE‑i.MX 6UL/ULL) and PCL‑077 (phyCORE‑i.MX 91/93) (LAN-114e.A0) RTC_XTAL Interface phyCORE-i.MX6 UL/ULL phyCORE-i.MX 91/93 SOM Pins X1-[140:141] involved Info The SOM's RTC_XTAL interface The RTC_XTAL interface of the SOM connector is directly is connected directly to the connected to the RTC Crystal interface of the PMIC. processor's RTC_XTAL Effect: None interface.
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Page 26: Revision History
Compatibility Guide - PCL‑063 (phyCORE‑i.MX 6UL/ULL) and PCL‑077 (phyCORE‑i.MX 91/93) (LAN-114e.A0) Revision History Date Version # Changes to this Manual 05.03.2024 LAN-114e.A0 Preliminary Version...
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