Processor Technologies; Caches - Matrox 4Sight X Installation And Hardware Reference

• Power management features.
• The Intel ICH8 interfaces with the BIOS via the serial peripheral interface (SPI)
bus. The Intel ICH8 also interfaces with the GME965 via the direct media
interface (DMI) at speeds up to 1.0 Gbytes/sec. In addition, the Intel ICH8
interfaces with the Super I/O controller chip via the low-pin count (LPC) bus.

Processor technologies

The Intel Celeron 550 and Intel Core 2 Duo T7500 both use processor
technologies designed to accelerate multimedia and imaging applications. The
processors use multimedia extension (MMX) technology, streaming SIMD
extensions (SSE, SSE2, SSE3, and SSSE3) technology, and EM64T (Intel 64
architecture) technology. These technologies are an extension to the Intel
architecture that address the key characteristics of applications that must handle
large amounts of image, video, and graphics data.

Caches

Both processors have primary (Level 1, or L1) and secondary (Level 2, or L2)
caches located in the processor.
The Intel Celeron 550 processor incorporates a 64-Kbyte, non-blocking primary
cache, which is separated into a 32-Kbyte data cache and a 32-Kbyte instruction
cache. The Intel Celeron 550 processor also incorporates a 1-Mbyte, unified
(non-separated), non-blocking secondary cache.
The Intel Core 2 Duo T7500 processor incorporates two 64-Kbyte, non-
blocking primary caches (one primary cache per core). Each primary cache is
separated into a 32-Kbyte data cache and a 32-Kbyte instruction cache. The Intel
Core 2 Duo T7500 processor also incorporates a 4-Mbyte, shared, non-blocking
secondary cache with virtualization technology.
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