Silicon Laboratories C8051F00 01 DK Series User Manual page 7

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6.4. Analog I/O (J6, Terminal Block)
An Analog I/O Configuration connector (J6) provides the ability to route analog I/O signals from the C8051F005
device to a terminal block by installing two shorting blocks on J6. It also allows the DAC outputs to be connected to
Comparator 0 inputs or to two ADC inputs. Analog signals may be routed to the AIO 0 and AI01 posts of the termi-
nal block by installing a shorting block between two adjacent pins on J6. Refer to Figure 3 to determine the shorting
block installation positions required to connect the desired analog signal to the terminal block. Refer to Table 3 for
terminal block connections and Table 4 for J6 pin definitions.
AIO1
AIO0
GNDA
Vref
Figure 3. J6 Analog I/O Configuration Connector
Table 3. Terminal Block Pin Descriptions
Pin #
1
2
7
AGND (Analog Ground)
8
Table 4. J6 Connector Pin Descriptions
Pin #
1
2
3, 9, 15
4, 10, 16
5
6
7
8
11
12
13
14
17
18
C8051F00x/01x-DK
Pin 1
Pin 2
CP0-
CP0+
DAC1
DAC0
AIN1
AIN0
AIN3
AIN2
AIN5
AIN4
AIN7
AIN6
J6
Description
AIO1
AIO0
VREF
Description
CP0+
CP0-
AIO1
AIO0
DAC0
DAC1
AIN0
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
Rev. 0.6
7

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