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Checkpoint
0Ah
0Bh
0Ch
0Eh
0Fh
10h
11h
12h
13h
14h
19h
1Ah
2Bh
2Ch
2Dh
23h
Appendix B: AMIBIOS POST Diagnostic Error Codes
Code Description
The CMOS checksum calculation is done. Initializing the
CMOS status register for date and time next.
The CMOS status register is initialized. Next, performing
any required initialization before the keyboard BAT
command is issued.
The keyboard controller input buffer is free. Next,
issuing the BAT command to the keyboard controller.
The keyboard controller BAT command result has been
verified. Next, performing any necessary initialization
after the keyboard controller BAT command test.
The initialization after the keyboard controller BAT
command test is done. The keyboard command byte is
written next.
The keyboard controller command byte is written. Next,
issuing the Pin 23 and 24 blocking and unblocking
command.
Next, checking if <End or <Ins> keys were pressed
during power on. Initializing CMOS RAM if the Initialize
CMOS RAM in every boot AMIBIOS POST option was
set in AMIBCP or the <End> key was pressed.
Next, disabling DMA controllers 1 and 2 and interrupt
controllers 1 and 2.
The video display has been disabled. Port B has been
initialized. Next, initializing the chipset.
The 8254 timer test will begin next.
The 8254 timer test is over. Starting the memory
refresh test next.
The memory refresh line is toggling. Checking the 15
second on/off time next.
Passing control to the video ROM to perform any
required configuration before the video ROM test.
All necessary processing before passing control to the
video ROM is done. Looking for the video ROM next and
passing control to it.
The video ROM has returned control to BIOS POST.
Performing any required processing after the video
ROM had control.
Reading the 8042 input port and disabling the
MEGAKEY Green PC feature next. Making the BIOS
code segment writable and performing any necessary
configuration before initializing the interrupt vectors.
B-3
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