Module Pin Descriptions - Murata Lbee58D1Vf-Temp Instruction Manual

5.3.

Module PIN Descriptions

No. Pin name
A1 GND
A2 PCIE_TXN
A3 GND
A4 PCIE_RXP
A5 GND
A6 PCIE_REFCLKN
A7 GND
A8 WLAN_SW_CTRL
A9 CLK_OUT_REF
A10 PCIE0P92_LDO_IN
A11 GND
A12 RFA0P8_LDO_IN
A13 CX_MX_BT_LDO_IN
A14 VDD18_DIG_IO
A15 GND
B1 GND
B2 PCIE_TXP
B3 GND
B4 PCIE_RXN
B5 GND
B6 PCIE_REFCLKP
B7 GND
B8 PCIE_CLKREQ#
B9 WL_LED/PCIE_BAR_
SIZE0
B10 GND
B11 PCIE18_LDO_IN
B12 GND
B13 CX_MX_BT_LDO_IN
B14 GND
B15 RFA12_LDO_IN
C1 PCIE_WAKE#
< Specification may be changed by Murata without notice >
Preliminary Specification Number : SP-8D1VF-H
Type System Connection to
IC pin name
GND -
I/O PCIE20_TXM
GND -
I/O PCIE20_RXP
GND -
I PCIE20_REFC
LK_EPCLK_N
GND -
I/O GPIO GPIO_46
I/O GPIO GPIO_55
I VDD13_PMU_
PCIE_I
GND -
I VDD09_PMU_
RFA_I
I VDD095_PMU
P
GND -
GND -
I/O PCIE20_TXP
GND -
I/O PCIE20_RXN
GND -
I WL PCIe PCIE20_REFC
LK_EPCLK_P
GND -
I/O GPIO GPIO_59
I/O GPIO GPIO_54
GND -
P VDD19_PMU_
PCIE_I
GND -
P VDD095_PMU
GND -
P VDD13_PMU_
RFA_I
I/O GPIO GPIO_58
Preliminary & Confidential
Murata Manufacturing Co., Ltd.
10 / 31
Description
Transmiter Negative
PCIE
Reciver Positive of PCIE
PCIe differential clock
input (negative). 100ohm
differential.
1.3 V input for 0.92 V
output LDO
0.9 V input for 0.8 V
output LDO
0.95 V input for BT LDO
VDD for Digital I/O circuit
Transmitter Positive
PCIE
Receiver Negative of PCIE
PCIe differential clock
input (positive). 100ohm
differential.
VDD PMU for LDO input
in PCIE
0.95 V input for BT LDO
1.3 V input for 1.2 V
output LDO
of
of