Csf Functionality; Clock And Scheduler Functionality; System Clock - Cisco Internet Router 12404 Technical Specifications

Appendix A Technical Specifications
MBus Module Port Pin Assignments

CSF Functionality

Clock and Scheduler Functionality

System Clock

OL-11636-01
Twenty general purpose pins and four analog input pins on the MBus module are
used for this design.
The CSF circuity provides synchronized speed interconnections for the line cards
and the RP (Figure A-5). The CSF circuitry consists of clock and scheduler, and
switch fabric functionality; is contained on one card, housed in the bottom slot in
the chassis. The CSF card has a switching capacity of 40 Gbps.
Figure A-5 CSF Card Slot
CLE AN CLAS S 1 LASE
R PROD UCT
CONNE CTOR LASER PROD
WITH ALCOHO UKT DER KLASS
WIPES L PROD UIT LASER E 1
CONNEC BEFORE
TING DE CLASS E
1
PRODU CTO LASER
DE CLASS E 1
0
1
2
MBU S
ALARM
FAIL
ENAB LE
CO NS OL
IDA TE D
The CSF card generates and distributes system-wide clock and cell time
synchronization signaling. System clock generation is delivered to the system via
the backplane and local clock functions are derived from the system clock.
The system clock synchronizes data transfers between line cards or between the
RP and a line card through the CSF. The system clock signal is sent to all line
cards and the RP.
Cisco 12404 Internet Router Installation and Configuration Guide
TX
RX
3
ACTIVE
CARRIE R
RX PKT
40C 48/ PO
S-S R-S C
GIG AB
IT RO UT
E PRO CE
SSO R
FABRI C
SW ITC H
FA BR IC
Product Architecture
A-21