# Pn Step Junctions (13, 1) - HP 48gII Advanced User's Reference Manual

Graphing calculator.

Variable
Description
Vt
Threshold voltage
Vt0
Threshold voltage (at zero substrate voltage)
Drawn mask width (PN Step Junctions), or
W
Drawn width (NMOS Transistors), or
Channel width (JFETs)
We
Effective width
xd
Depletion-region width
xdmax
Depletion-layer width
xj
Junction depth
References: 5, 8.

## PN Step Junctions (13, 1)

These equations for a silicon PN-junction diode use a "two-sided step-junction" model–the doping density
changes abruptly at the junction. The equation assume the current density is determined by minority carries
injected across the depletion region and the PN junction is rectangular in its layout, The temperature should be
between 77 and 500 K. (See "SIDENS" in Chapter 3.)
Equations:
V b i
2
s i
x d
=
- - - - - - - - - - - - - - - - - -- - - - - - - -
q
s i
C j
=
- - - - - - - - - - - - - - - - - - -
x d
2
s i
0 E 1
B V
=
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
2 q
A j
=
W 2
+
W L
k T
N A ND
- - - - - - - - - - - L N
- - - - - - - - - ------------ -
=
q
2
n i
0
1
1
V b i V a
-------- -
+
-------- -
NA
ND
0
2
Vbi Va
---------------------------------- -
E m a x
=
xd
1
1
- - - - - - - - -
+
- - - - - - - - -
J
=
Js
e
N A
N D
W
L 2
+
L
+
+
2
W 2
+
L
xj
+
2
I
=
J A j
q Va
--------------
k T
1
2
xj
Equation Reference 5-51