Extension Register (Reg-D) - Epson RX-8801SA/JE Applications Manual

Real time clock module
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RX − 8801 SA / JE

8.2.4. Extension register (Reg-D)

Address
Extension Register
D
∗1)
The default value is the value that is read (or is set internally) after powering up from 0 V.
∗2)
"o" indicates write-protected bits. A zero is always read from these bits.
∗3)
"−" indicates a default value is undefined.
• This register is used to specify the target for the alarm function or time update interrupt function and to select or set
operations such as fixed-cycle timer operations.
1) TEST bit
This is the manufacturer's test bit. Its value should always be "0".
Be careful to avoid writing a "1" to this bit when writing to other bits.
If a "1" is inadvertently written to this TEST bit, there is a safety function where by this bit will be automatically cleared to zero when a STOP
condition or Repeated START condition is received or when the 0.95-second bus timeout function operates.
TEST
Write/Read
2) WADA ( Week Alarm/Day Alarm ) bit
This bit is used to specify either WEEK or DAY as the target of the alarm interrupt function.
Writing a "1" to this bit specifies DAY as the comparison object for the alarm interrupt function.
Writing a "0" to this bit specifies WEEK as the comparison object for the alarm interrupt function.
3) USEL ( Update Interrupt Select ) bit
This bit is used to specify either "second update" or "minute update" as the update generation timing of the time
update interrupt function.
USEL
Write/Read
4) TE ( Timer Enable ) bit
This bit controls the start/stop setting for the fixed-cycle timer interrupt function.
Writing a "1" to this bit specifies starting of the fixed-cycle timer interrupt function (a countdown starts from a
preset value).
Writing a "0" to this bit specifies stopping of the fixed-cycle timer interrupt function.
5) FSEL0,1 ( FOUT frequency Select 0, 1 ) bits
The combination of these two bits is used to set the FOUT frequency.
FSEL0,1
Write/Read
6) TSEL0,1 ( Timer Select 0, 1 ) bits
The combination of these two bits is used to set the countdown period (source clock) for the fixed-cycle timer
interrupt function (four settings can be made).
TSEL0,1
Write/Read
Function
bit 7
TEST
(Default)
(0)
Data
0
Normal operation mode
1
Setting prohibited (manufacturer's test bit)
Data
update interrupts
0
second update
1
minute update
FSEL1
FSEL0
(bit 3)
(bit 2)
0
0
0
1
1
0
1
1
TSEL1
TSEL0
(bit 1)
(bit 0)
0
0
0
1
1
0
1
1
bit 6
bit 5
bit 4
WADA
USEL
TE
(−)
(−)
(−)
Description
Auto reset time
500 ms
∗ Default
7.813 ms
FOUT frequency
32768 Hz Output
1024 Hz Output
1 Hz Output
32768 Hz Output
Source clock
/Once per 244.14 μs
4096 Hz
64 Hz
/ Once per 15.625 ms
"Second" update
/Once per second
"Minute" update
/Once per minute
Page - 11
bit 3
bit 2
bit 1
FSEL1
FSEL0
TSEL1
(0)
(0)
(−)
t
RTN
∗ Default
ETM26E-03
bit 0
TSEL0
(−)
∗ Default

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