Interrupts - SeaLevel ISO-16.PCI User Manual

Interrupts

Port A bit zero is the interrupt source. The interrupt source is Base+0 bit D0. When selecting the interrupt mode,
always disable interrupts prior to changing or setting states. This will help prevent inadvertent or un-expected
interrupts from occurring. When using the high and low level interrupts, a change in state of the input must occur
before the interrupt can be cleared. The device providing the input to Base +0, bit D0 must do this.
PAD0-7 = Port A (Base+0)
PBD0-7 = Port B (Base+1)
IRC0-1= Interrupt Mode select (Base+5)
IRC1 IRC0
0
0
1
1
IRQEN = enable interrupts (Base+5)
0 = disabled
1 = enabled (disabled after reset or power up).
IRQST = interrupt status (Base+5)
1 = interrupt pending (reading the bit clears interrupt). Bit can not be written.
Sealevel Systems ISO-16.PCI
0 low level
1 high level
0 falling edge
1 rising edge
Technical Description
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