Table 18 Displayport (Dp) Signal Descriptions - Congatec COM Express conga-TCA3 User Manual

Signal Pin # Description
HDMI3_HPD C44 TMDS Hot-plug detect
Multiplexed with DDI3_HPD
HDMI3_CTRLCLK C36 TMDS I
Multiplexed with DDI3_CTRLCLK_AUX+
HDMI3_CTRLDATA C37 TMDS I
Multiplexed with DDI3_CTRLDATA_AUX-
Note
1. Some signals have special functionality during the reset process. They may bootstrap some basic important functions of the module. For
more information refer to section 8.2 "Boot Strap Signals".
2. The second HDMI interface is only available if LVDS is disabled.
3. The conga-TCA3 does not natively support TMDS. A DP++ to TMDS converter (e.g. PTN3360D) needs to be implemented.
Table 18 DisplayPort (DP) Signal Descriptions
Signal Pin # Description
DP1_LANE3+ D36 Uni-directional main link for the transport of isochronous streams and secondary data
DP1_LANE3- D37 Multiplexed with DDI1_PAIR3+ and DDI1_PAIR3-
DP1_LANE2+ D32 Uni-directional main link for the transport of isochronous streams and secondary data
DP1_LANE2- D33 Multiplexed with DDI1_PAIR2+ and DDI1_PAIR2-
DP1_LANE1+ D29 Uni-directional main link for the transport of isochronous streams and secondary data
DP1_LANE1- D30 Multiplexed with DDI1_PAIR1+ and DDI1_PAIR1-
DP1_LANE0+ D26 Uni-directional main link for the transport of isochronous streams and secondary data
DP1_LANE0- D27 Multiplexed with DDI1_PAIR0+ and DDI1_PAIR0-
DP1_HPD C24 Detection of Hot Plug / Unplug and notification of the link layer.
Multiplexed with DDI1_HPD
DP1_AUX+ D15 Half-duplex bi-directional AUX channel for services such as link configuration or
maintenance and EDID access
DP1_AUX- D16 Half-duplex bi-directional AUX channel for services such as link configuration or
maintenance and EDID access
DP2_LANE3+ D49 Uni-directional main link for the transport of isochronous streams and secondary data
DP2_LANE3- D50 Multiplexed with DDI2_PAIR3+ and DDI2_PAIR3-
DP2_LANE2+ D46 Uni-directional main link for the transport of isochronous streams and secondary data
DP2_LANE2- D47 Multiplexed with DDI2_PAIR2+ and DDI2_PAIR2-
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C Control Clock
2
C Control Data
2
I/O PU/PD Comment
I PCIE Not supported
I/O OD Not supported
3.3V
I/O OD Not supported
3.3V
I/O PU/PD Comment
O PCIE
O PCIE
O PCIE
O PCIE
I 3.3V PD 1M
I/O PCIE PD 100k
I/O PCIE PU 100k
3.3V
O PCIE
O PCIE
TA30m16
Boot strap signal (see note below).
Enable strap is already populated
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