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180
UWR#
182
UINT1#
183
UINT0#
184
URST
185, 186, 188,
UAD0 ~ UAD7
189, 190, 191,
192, 193
195
UALE/UA7
197
UPSEN#/IO3
198, 200
UA15, UA14
199
FLASH_WE#
/IO4
201, 202, 204
UA8, UA9,
UA10
203
FLASH_OE#
/IO5
Power Supply
7, 30, 43,
DGND
84,187
1, 34, 87, 196
DVDD
21, 133, 181
DVDD3
17, 81, 131, 178
DGND
152, 166
DVDD3
149, 163
DGND
97, 112,
DGND
122,135
102, 117, 127
DVDD
72
W_DVDD
75
W_DGND
44
TTL Input, SMT,
Microcontroller write strobe signal, low active.
50K pull-up
TTL Output,
Interrupt 1 signal output, low active.
Open-Drain
TTL I/O, SMT,
Interrupt 0 signal output, low active.
Slew rate,
Alternate function :
50K pull-up
microcontroller flash programming mode. A logical low signal
indicates to select flash ROM data for read cycle. And a logical
high indicates to select non-flash ROM data for read cycle.
TTL Output
Microcontroller reset signal output, high active.
TTL I/O,
Microcontroller address/data buses interface. Address and data
Slew rate,
are multiplexed by microcontroller and used ALE pin to separate
50K pull-up
address and data bus.
TTL Input, SMT,
Address latch enable input, high active.
50K pull-up
Alternate function :
bus separated type CPU (eg. H8) application.
TTL I/O, SMT,
External ROM output port enable signal input, low active.
Slew rate,
Alternate function :
50K pull-up
flash ROM application, the pin can be programmed as GPIO
function.
TTL I/O,
Address bus bit 15 and14 input.
Slew rate,
Alternate function :
50K pull-up
IDE flash programming mode.
TTL I/O,
Flash memory write enable signal output, low active.
Slew rate,
Alternate function :
50K pull-up
flash ROM application, the pin can be programmed as GPIO
function.
TTL I/O,
Address bus bit 10, 9 and 8 input.
Slew rate,
Alternate function :
50K pull-up
IDE flash programming mode.
TTL I/O,
Flash memory output enable signal output, low active.
Slew rate,
Alternate function :
50K pull-up
flash ROM application, the pin can be programmed as GPIO
function.
Ground
Ground pin for general pad buffer circuitry.
Power (5V)
Power pin for general pad buffer circuitry.
Power (3.3V)
Power pin for internal digital circuitry.
Ground
Ground pin for internal digital circuitry.
Power (3.3V)
Power pin for RAM pad buffer circuitry.
Ground
Ground pin for RAM pad buffer circuitry.
Ground
Ground pin for Host pad buffer circuitry.
Power (5V)
Power pin for Host pad buffer circuitry.
Power (5V)
Power pin for internal fully digital circuitry.
Ground
Ground pin for internal fully digital circuitr
ROM
chip
select
Address bus bit 7 input during address/data
Programmable bi-directional IO3. For non-
Address bus bit 15 and 14 output during
Programmable bi-directional IO4. For non-
Address bus bit 10, 9 and 8 output during
Programmable bi-directional IO5. For non-
input
during
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