Toshiba BC Series Instruction Manual page 30

Cmos camera
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Register
Read
address
Write
0x0021 F29C
0x0021 F2BC
0x0040 0000
0x0040 0004
0x0040 0008
R/W
0x0040 000C
0x0040 07F8
0x0040 07FC
0x0021 F31C
R/W
0x0021 F33C
R/W
0x0050 0040
0x0050 0044
0x0050 0048
R/W
0x0050 004C
0x0050 0078
* 0.4M : BC040M, 1.6M : BC160M
* For registers other than those mentioned above, please refer to the IIDC2 Digital Camera Control
Specification Ver.1.0.0.
*AC: In relation to Acquisition Command (address:0x002 0303C) : If [AC] marked "✓", the register is set to
following procedure.
Stop image output (0x0) → register setting / write command → Start image output (0x08)
R/W
:Read / Write possible
R.O.
:Read Only
W.O.
:Write Only
N.A.
:Not available
Copyright © 2019 Toshiba Teli Corporation, All Rights Reserved.
Memory
AC(*)
Default
save
0x0
0x0
-
0x0
-
0x0
-
0x1
-
0x1
Register name
Sets the activation of DPC (Defective pixel correction) function.
DPCEnable
0x0:OFF, 0x1:ON
Sets the number of pixels to correct.
DPCNumber
0x0 (0) ~ 0x100 (256)
Sets the X coordinate of defective pixel (1st)
DPCValue [X
]
0.4M:0x0(0)~0X2CF(719)
1
1.6M:0x0(0)~0X59F(1439)
Sets the Y coordinate of defective pixel (1st)
DPCValue [Y
]
0.4M:0x0(0)~0X21B(539)
1
1.6M:0x0(0)~0X437(1079)
Sets the X coordinate of defective pixel (2nd)
DPCValue [X
]
0.4M:0x0(0)~0X2CF(719)
2
1.6M:0x0(0)~0X59F(1439)
Sets the Y coordinate of defective pixel (2nd)
DPCValue [Y
]
0.4M:0x0(0)~0X21B(539)
2
1.6M:0x0(0)~0X437(1079)
Sets the X coordinate of defective pixel (255th)
DPCValue [X
]
0.4M:0x0(0)~0X2CF(719)
255
1.6M:0x0(0)~0X59F(1439)
Sets the Y coordinate of defective pixel (255th)
DPCValue [Y
]
0.4M:0x0(0)~0X21B(539)
255
1.6M:0x0(0)~0X437(1079)
Sets the activation of Sequential Shutter (SS) function.
SS Enable
0x0:OFF,0x1:ON
Sets the number of Tables to repeat the sequence.
SS TerminateAt
Min:0x1(1),Max:0x10(16)
SS Entry 0
SS Entry 1
SS Entry 2
Sets the UserSet number to register to the first sequence.
Min:0x1(1),Max:0xF(15)
SS Entry 3
SS Entry 15
28 / 73
Description
D4296087A
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