Cf611 - Toshiba V Series User Manual

Sequence controllers
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Chapter 2 General Specifications
2
100

CF611

Item
Function
Common memory
Transmission mode
Synchronization
Transmission Speed
Transmission code
Interface
Frame Format
I/O occupacy area
Data exchange method
LED Display
Isolation
Current consumption
Weight
Circuit Configuration
I/O
bus
Connector Connections
Communicate with the devices via serial interface
160 words × 2
Full-duplex
Asynchronous (Start-stop method)
300, 600, 1200, 2400, 4800, 9600, 19200bps
ASCII
Conforms to RS232C 1 channel
Start bit
: 1bit
Data
: 7 or 8bits
Parity bit
: even/odd/none
When none parity is selected, the data bit length must be 8 bits.
Stop bit
: 1 or 2bits
When 2 stop bits is selected, the data bit length must be 7 bits.
iX+Y 4W area (Input prohibit/Output prohibit)
By MREAD/MWRITE instructions of the S2
Transmission data
None (between RS232C port and internal circuit)
550mA (5Vdc) or less
Approx. 300g
CPU
2-port
buffer
ROM
RAM
I/O
I/F
1
2 RXD
TXD
3 TXD
RX
4 DTR
DS
5 SG
SG
6 DSR
DTR
7 5Vdc
8
9
D-SUB 9pin (female)
model 2000 Sequence Controller S2 User's Manual -Basic Hardware-
CF611
Reset switch
TXD
RS232C
RXD
I/F
DTR
DSR

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2000

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