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Select TAS
SLTA or 86 with
Q7
of I
Description.
This instruction, provided with the
Random Addressing special feature, is used to transfer
the three digits in the
TAS
register (000-299) to the P
address and to successively higher-numbered core stor-
age locations. The high-order digit is automatically
flagged in core storage. Data and flag bits in core stor-
age that have been replaced are lost. The contents of
the
TAS
register are not altered. The
Qs - Qll
digits of
the instruction are not used.
Execution Time. T
==
240.
Select Real-Time Clock
SLTC or 86 with
Q7
of 4
Description. This instruction, a basic feature of the
system, is used to transfer the contents of the
RTC
to core
storage. Storage begins at the P address and continues
through three successively higher-numbered locations.
The high-order digit is flagged. Core storage data that
is replaced, including flag bits, is lost.
This instruction may be executed while the multi-
plexer is busy. The
Qs - Ql1
digits of the instruction
are not used.
Execution Time.
T
==
240.
1£ the clock is advancing when the Select Real-Time
Clock instruction is executed, the computer may be
interlocked for up to 320 ms.
Input/Output Operations with the
1710 Process Operator Units
Select Input Channel
Read Numerical Input Channel
Read Alphabetic Input Channel
Write Numerical Output Channel
Write Alphabetic Output Channel
Select Input Channel
SLIC or 86 with
Q7
of 5
Description. This instruction, provided with the
Serial Input/Output Channel special feature, is used
to select the address of an input unit via
TAS~
which
places the character from the input unit into the
Input/Output Data Register
(IODR).
This instruction
must be followed by an
SIOC
read instruction in order
to transfer the character from
IODR
to core storage.
The P address is not used. The
Q7
position must
contain a 5. The
QlO
and
Qll
positions of the instruc-
tion are used to specify the input unit to be selected.
Execution Time. T
==
160.
50
Read Numerical Input Channel
RNIC or 86 with
Q7
of 5
Description. This instruction, provided with the
Serial Input/Output Channel special feature, is used
to transfer a character from
IODR
to core storage in the
numerical mode.
The P address specifies the core storage address where
the character is to be placed. The
Q7
position must con-
tain a 5.
Execution Time. T
==
190.
Read Alphameric Input Channel
RAIC or 87 with
Q7
of 5
Description. This instruction operates the same as
the Read Numerical Input Channel instruction, except
that data is placed in core storage in the alphameric
mode.
The P address must be an odd-numbered address.
Execution Time. T
==
240.
Write Numerical Output Channel
WNOC or 88 with
Q7
of 5
Description. This instruction, provided with the
Serial Input/Output Channel special feature, is used
to select an output unit via
TAS~
and then to transfer a
character from core storage into
IODR
and then out of
IODR
to an output unit. The character is read out of
core storage in the numerical mode.
The P address is the core storage address of the char-
acter to be transmitted. The
Q7
position must contain
5. The output unit to be selected is specified by the
QIO
and
Qll
positions of the-instruction.
Execution Time.
T
==
200.
Write Alphameric Output Channel
W AOC or 89 with
Q7
of 5
Description. This instruction operates the same as
the Write Numerical Output Channel instruction ex-
cept that the character is read out of core storage in
the alphameric mode. The P address must be an odd-
numbered address.
Execution Time.
T
==
200.
Branch Instructions
Branch Indicator
BI-46
This is a standard 1620
CPU
instruction. It is described
here to show both the 1620 and 1710 indicators that
can be tested.
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