Table of Contents
Advertisement
also operates
a
maximum mode so
in
It
added
feature.
can
be
as a
modes
which
can
be switched, namely
and the
Turbo mode. When
Normal mode (4.77MHz), the
a
14.318MHz crystal,
from
cessor
and
obtain
clock,
by 4 to
signal required for color television. When
mode
operating
Turbo
in
(10MHz),
30MHz.
rived from
DMA
Three
the
channels are
of
four
DMA
bus and support high-speed
devices and
memory without
fourth
channel
is
programmed
DMA
done
dynamic memory. This
is
the timer counter device
of
transfer.
This action
dummy
DMA
available
cycle which
to
is
the system board and expansion
on
transfers except the refresh channel take
210ns
clocks
of
or 1.05us
if
deactivated. Refreshing
DMA
(840ns).
Timer
The
three programmable timer/counters are used
the system
Channel
as
follows:
timer providing a
purpose
a
implementing
time-of—day
time
and request refresh cycles
and Channel
used
support the tone generation
2 is
to
the
channel has a
audio
speaker.
Each
resolution
of
1.05us.
22
a
coprocessor
The
two
processor operate
in
mode
the
Normal
the processor
operating
is
in
derived
frequency
which
is
divided
three
the
is
for
by
pro—
the
3.58MH2 color burts
the processor
the frequency
is
de-
,
available on
the
l/O
data
transfers between
l/O
The
intervention.
processor
the system
refresh
to
a
channel
programming
by
to
request
periodically a
creates
memory-read
a
refresh
both
dynamic
storage
data
slots.
DMA
All
five
processor
the
line is not
processor
ready
takes
four
clocks
cycles
by
used
as a
0 is
general-
constant
time
base
for
Channel
used
clock;
is
to
1
from
the
channel;
DMA
for
minimum timing
Interrupt
Of
0
bussed
cards.
the highest
timer/counter and provides a periodic
is
time-of-day
adapter
code sent
(NMI)
Memory
The
memory.
EPROM. This
drivers, dot
and a
640KB
memory.
Keyboard
The system board contains the
attaching the serial interface
circuits
complete scan code
execution
keyboard interface
system board that extends
system
O
the eight
levels
prioritized
the expansion slots
to
for
are used
the system
Two
levels
on
attached
is
priority,
attached
clock. Level
is
1
circuits
and receives
an interrupt for
the
keyboard. The
Non—Maskable
by
the
8088
used
to report memory-parity errors.
of
is
board
supports
both
system
and
has space
for 32KB
It
x
1
contains
a
ROM
power-on
characters
for 128
patterns
diskette. The
board also
system
RM
minimum
of
A
memory.
from
the processor when a
generate
an interrupt to
received. The interface can
is
test
a diagnostic
of
in
is
a
DIN
five-pin
through
unit.
of
interrupts,
six
are
the interface
use
by
board.
Level 0,
Channel
the
to
0 of
the
interrupt for
the keyboard
to
each scan
Interrupt
ROM/EPROM and
FWV
8KB
of ROM
or
x
1
self—test, l/O
graphics
mode
in
has
256KB to
from
system has
256KB
of
adapter
circuits for
the keyboard. These
request
the keyboard. The
the
connector
on
the rear panel
the
of
23
Advertisement
Table of Contents
