SYSTEM/360 I/O INTERFACE
The I/O interface sequences, data bytes, and signal
lines are described in detail in the Original Equip-
ment Manufacturer's Information manual, Form A22-
6843. The meaning of sense and status bytes for a
2702/03 are described in this chapter.
The 2702 and 2703 differ in the number of data bytes
transferred during anyone I/O channel data-servicing
sequence. The 2702 transfers one byte at a time,
while the 2703 transfers data in bursts of up to four
The status byte signals the I/O interface the status
of the 2702/03 during initial selection of a command
and at the completion of a command.
Figure 2-8 shows the status bits that can be set
by the 2702/03.
All Zeros. This signals the channel that the 2702/03
is able to attempt to perform the command.
Status Modifier, Control Unit End, and Busy. This
signals the channel that the command is incapable of
being performed at this time. This status-byte
configuration is due to the 2702/03 control-unit
portion being busy or in a machine-reset condition.
Unit Check. This signals the channel that the com-
mand is incapable of being executed. This status-
byte configuration is dUEl to either a parity check of
the command byte or an invalid command code.
Status Modifier. This status-byte configuration is
sent to the channel upon decoding of a Test I/O instruc-
the control-unit portion of the 2702/03 is
busy, the status for a Test I/O instruction will be as
noted under "Unit Check" preceding.
Channel End and Device End. This status-byte con-
figuration is sent to the channel upon decoding of an
I/O No Op command.
The conditions turning on the ending-status bits for
different commands and terminal controls are shown
in Figures 2-9 and 2-10. The meaning of combina-
tions of status bits follows.
Initial Selection. Positive Poll response received. (Included for BSC
are timeout, and polling address received during Address Prepare.)
Control Unit End
Devi ce End
Error (Caused by any sense bit ON).
Unusual Condition (See figures entitled
"Ending Status . . . ").
Figure 2-8. Status Bits