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Table 2-5.
CE Panel Switches (Part 1 of 3)
Switch
STORAGE BIT ENTRY
TEST LCW (Line Control
Word) ADDRESS
DISPLAY WRAP LCW's
INDICATOR TEST
INTF (Interface) TEST
CONTINUOUS LOAD
INHIBIT LCW MOD
MUL T1CYCLE
INHIBIT TRAP RESET
2-14
Definition and Action
Toggle, positions 0-34. When the CONTINUOUS LOAD switch is pressed, the con-
tents of these switches are loaded into each, word as all core-stora_ge words are scanned.
When the SINGLE-CYCLE LOAD switch is pressed and the SINGLE-CYCLE switch
pushed/ the contents of these switches are loaded into the selected word.
When doing
a CE-Panel Wrap or TSMT Single Character operation/ the contents of these switches
are loaded into MDW upon request of the transmit line. When the INTF TEST switch
is pressed/ switches 0-15 are used to simulate the Bus Out and Out Tags from the
multiplex channel.
Pushbutton.
These switches select the line to be tested and displayed from the Main
Capture Regi ster.
BASE SELECT 1 and 2 switches select the base to which the line is attached.
BASE ADDRESS
1/
2/4/8/ 16/32/ and 64 switches select the line within the base.
Pushbutton. This switch displays the LCW's of the wrap address rather than the LCW's
selected by the TEST LCW ADDRESS switches.
Pushbutton.
This switch provides a quick check of all the indicators on the CE panel.
Pushbutton. This switch enables the STORAGE BIT ENTRY switches (0-15) to simulate
the Out Tags and I ntf Bus Out.
Manual manipulation of these switches gives the CE the ability to issue commands
and perform data transfer from the CE panel.
The I NTF TEST switch is active when
the machine is in off-line status as initiated by placing the METER switch on the
operator panel in the OFF position.
Pushbutton. This switch forces the scan of all addresses in core storage and loads the
contents of the STORAGE BIT ENTRY switches (0-34) into every address.
Releasing the switch degates the load function/ but scanning of all addresses con-
tinues until the MACHINE RESET switch is pressed.
Two checks are performed during this test: a Parity Check and a Compare Check
(compares the output of storage against the STORAGE BIT ENTRY switches).
If a mal-
function is detected while the STOP ON ERROR switch is pressed/ the core-storage
address and the data will be locked in registers for CE observation.
This switch is
active when the machine is in off-line status/ as initiated by putting the METER
switch on the operator panel to the OFF position.
Pushbutton. This switch blocks all modification of the LCW's associated with the line
under test.
This switch is active when the CE TEST switch is ON.
Pushbutton. This switch and Test OSC switch depressed substitutes the 4.5 cps -
oscillator for the line oscillator. This switch is active when:
1. The CE TEST switch is on for SIS.
2. The WRAP and CE TEST switches are on for BSC.
Pushbutton.
This switch is used in conjunction with the TEST LCW ADDRESS and the
STOP ON ERROR switches. When these switches are pressed/ a Storage Parity Check
detected while in CE Test causes the clock to stop and the Main Capture Register to
contain the selected LCW as it was before the error occurred.
Releasing the INHIBIT TRAP RESET switch then gates the contents of the MDR (the
word in error) into the Main Capture Register. If the selected LCW was the one in
error / then a comparison of the previous and current Main Capture Register contents
enables you to determine which circuitry was active when the error occurred.
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