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A
~~
~
OFF
I
CO
CLOCK RING
lC-CLK WRAP
LINE
CE
a
7
6
5
4
3
2
I
B DR
CHK
TEST
TEST
A
A
0000000000 0 0 00
MACHINE
RESET
~ S BINARY CLOCK~ ~BINARY CLOCK-------;l
~CHECK~
@
16
a
4
2
I
16
a
4
2
I
C-CLK S-CLK LI
L2
B
0000000000 0000
CMND UNIT LCW
SVC
IN
REO
CYCLE BUSY SEL CYCLE BUSY
SEL
C
OOOOOOOOOC
000000
~
DIAL ADR
~
r-;-
DIAL DIGIT
~
DIAL
,DIGIT-,
TEST
16
a
4
2
I
a
4
2
I
BUSY
PRES
SENT
WRAP
OSC
D
000000000000000 0
CAPTURE REGISTER
15
14
13
12
II
10
9
a
7
6
5
4
3
2
I
0
I
CR
LINE ADAPTER
INLKI~NBd
I,
7
I/O REGISTER,
I
S
PND
ACR
PI'
SD:
RDI
,6
5
'4
: 3:
: 2
:1
0
TEST
CHECK FIELD
I
7
IINTVNCMNDOVER
TO BUSOUTEOPTB
LI
6
5
4
3
2
I
o
REQD
REJ
RUN CPLT
P CHK CHK
RI
0000000000000000
I
7
6
5
4
3
2
1
o
IL
4
2
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4
2
~
SERIAL QAT!" FIE.LD
A
•
BIT COUNT
STROBE COUNT
D
D
S LINE CONTROL WORD
LOSe!
S
IDATA TSMTIBIT SVC'
sca
SC4
sci
SCI
DATA BUFFER
o
ISTACK
~~~~ ~~~
END
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B
TEST
I 7
L2
6
5
4
3
2
I
R2
0000000000000000
L
2
~
CHAR
L
2
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REC
L
5 6
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TIME
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I
J
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SVC
SEQUENCE
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A
I
5
10
15
7
6
5
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3
2
I
0
IS
14
13
12
Jl
10
"""9
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G
TEST -LCW
iOdOdOdDdDdDdDdDdi
SINGLE
RESET
CYCLE
H
@
TEST
INH
MULTI
CE
@
CLOCK
OSC
LOAD
WRAP LCW MOD
CYCLE
TEST
J
igadgDdDd~DdOdi
TEST -LCW
OFF LINE
LINE ZERO
~TEST-LCW ADDRESS~
ADAPTER
TEST
16
a
4
2
I
DISABLE
K
(0
iITdggggi
(0 t;})
TEST -LCW ADR
ENABLE
NORMAL
~
~
TSMT
2f"MOH
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~6~
DRIVER
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DEGATE ' \
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0-7 -
-
8-15
l~:J ~~~J
POWER CONTROL
DISPLAY
LINE CTL WORD
LOAD LINE CTL WORD
Figure 2-4. 2702 CE Panel
Operations
2-5
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