HP 53150A Series Programming Manual page 68

Chapter 3 Programming Your Counter for Remote Operation
Status Reporting
Table 3-4. Status Byte Register
BIT WEIGHT SYMBOL
— —
0
— —
1
2 4 EAV
3 8 QSB
4 16 MAV
5 32 ESB
6 64 RQS/MSS
7 128 OSB
A detailed description of each bit in the Status Byte Register follows:
• Bits 0 - 1 are not used.
• Bit 2 (EAV) Summarizes the Error/Event Queue.
This bit is set when the Error/Event Queue is not empty.
• Bit 3 (QSB) summarizes the Questionable Data Status Event
Register.
This bit indicates whether or not one or more of the enabled
Questionable Data events have occurred since the last reading or
clearing of the Questionable Data Status Event Register.
This bit is set TRUE (one) when an enabled event in the Questionable
Data Status Event Register is set TRUE. Conversely, this bit is set
FALSE (zero) when no enabled events are set TRUE.
• Bit 4 (MAV) (Message AVailable) summarizes the Output Queue.
This bit indicates whether or not the Output Queue is empty.
This bit is set TRUE (one) when the Counter is ready to accept a
request by the external computer to output data bytes; that is, the
3-28
DESCRIPTION
Not used
Not used
Error/Event Queue Not Empty
Questionable Data/Signal Status Register
Summary Bit
Message Available Summary Bit
Standard Event Status Register Summary Bit
Request Service/Master Status Summary Bit
Operation Status Register Summary Bit
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