Siemens SIMATIC S5 Manual page 121

Ip 265 high speed sub control
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Programming the IP 265 with COM 265
Delay
Set/Reset function
Delay "D-FF":
The language element has one binary input (D) and
one binary output (Q).
The input signal is delayed by an interval of one
internal clock pulse (128 kHz).
Example:
Each time the signal state of input I 0.0
changes from "0" to "1" or from "1" to
"0", the signal state of output Q 0.5 also
changes, but this change is delayed by
7.8 µs.
STEP 5 (which is used for programming SIMATIC CPUs) does not have this language element;
since CPU programs are scanned sequentially, it is not needed.
Possible options for delays:
The input can be inverted.
The output can be inverted when it leads immediately to the control system flowchart's output
bar.
The delay can be converted into type-conforming language elements "2:1", "EF" and "Clock
pulse".
The "D-FF" delay function is sometimes required e.g. for synchronizing latching language elements.
The significance of this COM 265 language element is illustrated in an example on the following
page.
9-16
Table 9-6. Delay
I 0.0
Signal states
1
0
1
0
1
t:
/
CSF (example)
D-FF
>
D
Q
Timing diagram
t
t
kHz=7.8 µs
128
EWA 4NEB 812 6130-02a
IP 265
Q 0.5
I 0.0
Q 0.5
t
Time
in ms

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