Siemens SIMATIC S5 Manual page 119

Programming the IP 265 with COM 265
Binary scaler
Set/Reset operation
Binary scaler "2:1":
The language element has one binary input (C) and
one binary output (Q).
Each rising input signal edge inverts the signal state
of the output, effecting a division of the frequency by
two.
Example: A change in the signal state of input I 0.0
from "0" to "1" inverts the signal state
of output Q 0.5, effectively halving the
frequency at Q 0.5.
In IP 265 control system flowcharts, the binary scaler is an explicit language element. In STEP 5
(SIMATIC CPU programming), a binary scaler is implemented by the use of flags and the inter-
connection of several language elements (2 segments).
Possible options for binary scalers:
• The input can be inverted.
• The output can be inverted when it leads immediately to the control system flowchart's output
bar.
• The binary scaler "2:1" can be converted into the type conforming language elements "EF",
"D-FF" and "Clock pulse" (refer to information on the pages following).
9-14
Table 9-4. Binary scaler
CSF (example)
2:1
I 0.0
> C
Q
Timing diagram
Signal states
1
0
1
0
EWA 4NEB 812 6130-02a
IP 265
Q 0.5
I 0.0
Q 0.5
Time