Schematic Diagrams; Main (Main Connection (1/4)) Schematic Diagram - Panasonic SDR-H80P Service Manual

8 Schematic Diagrams

8.1.

MAIN (MAIN CONNECTION (1/4)) SCHEMATIC DIAGRAM

(MAIN P.C.B.)
N
TO HDD
FP21 C9002
0.01u
25V
HDD_RST
21 HDD_UNLOAD_H
20 HDD_GND
R9027
22 HDD_3.3V 1k
19 HDD_GND
23 HDD_3.3V
18 HDD7 ATADD7
24 HDD_DASP
17 HDD8 ATADD8
R9048
25 HDD_CS1 33
16 HDD6 ATADD6
26 HDD_CS0
15 HDD9
ATADD9
27 HDD_DA2
14 HDD5 ATADD5
28 HDD_DA0
13 HDD10 ATADD10
29 PDIAG
12 HDD4 ATADD4
30 HDD_DA1
11 HDD11 ATADD11
M
31 HDD_INTRQ
10 HDD3 ATADD3
32 HDD_DMACK
9 HDD12
ATADD12
33 HDD_GND
8 HDD2 ATADD2
34 HDD_IORDY
7 HDD13
ATADD13
35 HDD_GND
6 HDD1 ATADD1
36 HDD_DIOR
5 HDD14 ATADD14
37 HDD_DIOW
4 HDD0
ATADD0
38 HDD_GND
3 HDD15 ATADD15
39 HDD_DMARQ
HDD_GND
2
40 HDD_GND
L
1
R9018
0
K
J
TO CCD
FP31
1
2
3
4
5
6
I
7
8
9
10
11
12
13
14
15
16
17
18
H
A B
1 2
XATARESET
XATADASP
XATACS3
XATACS1
ATADA2
ATADA0
XATAPDIAG
R9049
33 ATADA1
XATAINTRQ
XATADMACK
XATAIORDY
XATARD
XATAWR
XATADMARQ
MEMORY
TO SYSCON/VIDEO
(D-1) XRST_ARM (F3)
TO VIDEO
XSCS0 (F4)
XSWE0 (F5)
XARD (F6)
(D-1)
AADR[1-16] (F7)
ADAT[0-15] (F8)
RY/XBY (F9)
TO VIDEO
DRAMSDAT[0-31] (F10)
TO POWER
REGD1.8V
(F1) REGD1.8V DRAMSDQM0 (F11)
(G-1)
(F2) D_GND DRAMSDQM1 (F12)
DRAMSDQM2 (F13)
DRAMSDQM3 (F14)
XDRAMSWE (F15)
XDRAMSCAS (F16)
(F-1)
XDRAMSRAS (F17)
DRAMSCLKO (F18)
DRAMSCKE0 (F19)
DRAMSCS0 (F20)
DRAMSBA0 (F21)
DRAMSBA1 (F22)
DRAMSADR[0-12] (F23)
TG/AFE
TO CCD
(G1) H2
(F-10)
(G2) H1 TO RESIZE/KAO
(G3) CCD_VL (A-10) ADIN_RESIZE[0-9] (G19)
(D-2/E-2)
(G4) SUB
(F-10) RESIZE_FCK (G20)
(G5) CCD_RESET
(F-10)
(G6) CCD_12V TG_VD (G21)
SENS_TEMP_VREF
(G-2)
TG_HD (G22)
(G7) CCDOUT (D-10)
TO CCD
(G8) V1
(G9) V2
(G10) V3
(D-2)
(G11) V4
(G12) V5
TO SYSCON
(G13) V6
(G-2) CG_RST (G23)
CAM_CG_CS (G24)
(C-10) CGAFE_DTO (G25)
CGAFE_CLK (G26)
C D E F G
3 4 5
VIDEO
TO SD CARD
(B-1) SD_DOOR_SW (J37)
TO USB HOST
CARD_PRO (J38)
(J1) ATADAT[0-15] (J-19)
CARD_DET (J39)
TO USB HOST/HDD
SD_CLK (J40)
XATARESET
(J2) XATARESET
XATAWR (M-19) CMD_O (J41)
(J3) XATAWR
XATAIORDY SDDATA3 (J42)
(J4) XATAIORDY
XATAINTRQ SDDATA2 (J43)
(J5) XATAINTRQ
SDDATA1 (J44)
ATADA1
(J6) ATADA1
SDDATA0 (J45)
ATADA0
(J7) ATADA0
(J-19)
XATACS1
(J8) XATACS1
XATACS3
(J9) XATACS3
ATADA2
(J10) ATADA2
XATADMACK TO USB HOST
(J11) XATADMACK
UNI_USB_D- (J46)
ATADD[0-15] XATARD
(K-19)
(J12) XATARD
UNI_USB_D+ (J47)
XATADMARQ
(J13) XATADMARQ TO USB HOST/USB JACK
TO HDD (B-1) VBUS (J48)
(J14) ATADD[0-15] (J-19) TO USB HOST
(B-1)
USB_VBUS_ON_H (J49)
TO SYSCON/HDD
(N-19) USB_VBUS_CURDE_L (J50)
(J15) HDD_UNLOAD (M-19)
(N-19) USB_HOST_INT (J51)
TO USB HOST/USB JACK
(E-1) USB_DET_L (J52)
TO USB HOST
USB_HOST_ERROR_L (J53)
(E-1) ARM_USBHOST_RST
ARM_USBHOST_RST (J55)
TO AVIO
AVIO_SIF_RST
AVIO_SIF_RST (J56)
TO MEMORY SBA_CS
SBA_CS (J57)
(B-1)
(J16) XSCS0 SBA_SIF_CLK
SBA_SIF_CLK (J58)
(J17) XSWE0
SBA_SIF_SDA
SBA_SIF_SDA (J59)
(J18) XARD
SDO0 (J60)
(D-1)
(J19) AADR[1-16]
SDI (J61)
(J20) ADAT[0-15]
LRCK (J62)
(J21) RY/XBY
BCK (J63)
(E-19)
MCK (J64)
VIDEO_ADJ
TO MEMORY VIDEO_ADJ (J65)
(J22) DRAMSDAT[0-31] UNI_COUT
UNI_COUT (J66)
(J23) DRAMSDQM0 UNI_YOUT
UNI_YOUT (J67)
(J24) DRAMSDQM1
(J25) DRAMSDQM2
(J26) DRAMSDQM3
(J27) XDRAMSWE
(L-1/M-1)
(J28) XDRAMSCAS
(J29) XDRAMSRAS
(J30) DRAMSCLKO
TO LCD
(J31) DRAMSCKE0 LYCIO0
LYCIO0 (J68)
(J32) DRAMSCS0 LYCIO1
LYCIO1 (J69)
(J33) DRAMSBA0 LYCIO2
LYCIO2 (J70)
(J34) DRAMSBA1 LYCIO3
LYCIO3 (J71)
(J35) DRAMSADR[0-12] LYCIO4
(F-19) LYCIO4 (J72)
LYCIO5
LYCIO5 (J73)
LYCIO6 (J74) LYCIO6
LYCIO7
LYCIO7 (J75)
CLK27C
CLK27C (J76)
LCD_SCK
LCD_SCK (J77)
LCD_SD
(N-19) LCD_SD (J78)
LCD_CS
LCD_CS (J79)
TO MAIN CN
ARMTDI
ARMTDI (J80)
ARMTDO (J81) ARMTDO
ARMTCK
ARMTCK (J82)
ARMTMS
ARMTMS (J83)
TRACECLK
TRACECLK (J84)
TRACESYNC
TRACESYNC (J85)
EXTRGO0
(J-1) EXTRGO0 (J86)
RTCK (J87)
DBGR (J88)
DBGA (J89)
TXD (J90)
RXD (J91)
TRACEPKT[0-7] (J92)
CG_RST
PIPESTA[0-2] (J93)
CAM_CG_CS
CGAFE_DTO
CGAFE_CLK
H I J K L M N
6 7
31
LOCATION MAP
1 1/4 2/4
2
3/4 4/4
SD_DOOR_SW
CARD_PRO
CARD_DET
SD_CLK
CMD_O
SDDATA3
SDDATA2
SDDATA1
SDDATA0
3
4
5
6
7
8
9
10
11
SDO0
SDI
LRCK
BCK
MCK
12
13
NOTE:
DO NOT USE ANY PART NUMBER SHOWN ON
THIS SCHEMATIC DIAGRAM FOR ORDERING.
WHEN YOU ORDER A PART, PLEASE REFER
TO PARTS LIST.
RTCK
DBGR TO
DBGA MAIN (MAIN CONNECTION (3/4))
TXD SECTION
RXD
SDR-H80, H81, H90
O P
MAIN (MAIN CONNECTION (1/4))
SCHEMATIC DIAGRAM
8 9
SDR-H80P
10